Optimal Scheduling for Conditional Recource Sharing. - Akihisa Yamada 001; Satoru Nakamura; Nagisa Ishiura; Isao Shirakawa; Takashi Kambe (ISCAS, 1995)

Architecture evaluation based on the datapath structure and parallel constraint. - Masayuki Yamaguchi; Akihisa Yamada 001; Toshihiro Nakaoka; Takashi Kambe (ASP-DAC, 1997)

A method of redundant clocking detection and power reduction at RT level design. - Mitsuhisa Ohnishi; Akihisa Yamada 001; Hiroaki Noda; Takashi Kambe (ISLPED, 1997)

A Scheduling Method for Synchronous Communication in the Bach Hardware Compiler. - Ryoji Sakurai; Mizuki Takahashi; Andrew Kay; Akihisa Yamada 001; Tetsuya Fujimoto; Takashi Kambe (ASP-DAC, 1999)

Hardware synthesis with the Bach system. - Akihisa Yamada 001; Koichi Nishida; Ryoji Sakurai; Andrew Kay; Toshio Nomura; Takashi Kambe (ISCAS (6), 1999)

Thread partitioning method for hardware compiler bach. - Mizuki Takahashi; Nagisa Ishiura; Akihisa Yamada 001; Takashi Kambe (ASP-DAC, 2000)

A C-based synthesis system, Bach, and its application (invited talk). - Takashi Kambe; Akihisa Yamada 001; Koichi Nishida; Kazuhisa Okada; Mitsuhisa Ohnishi; Andrew Kay; Paul Boca; Vince Zammit; Toshio Nomura (ASP-DAC, 2001)

Hardware Algorithm Optimization Using Bach C. - Kazuhisa Okada; Akihisa Yamada 001; Takashi Kambe (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

C-based hardware design of IMDCT accelerator for Ogg Vorbis decoder. - Shinichi Maeta; Atsushi Kosaka; Akihisa Yamada 001; Takao Onoye; Toru Chiba; Isao Shirakawa (EUSIPCO, 2004)

C-based design of a real time speech recognition system. - Takashi Kambe; H. Matsuno; Y. Miyazaki; Akihisa Yamada 001 (ISCAS, 2006)

A multi-core architecture of digital back-end for large mutual capacitance touch sensing systems. - Akihisa Yamada 001; Yan Qian; Masayuki Yamaguchi; Hiroshi Honjoh; Takahiro Morishita; Shunsuke Nagasawa; Shinji Shinjo; Masayuki Miyamoto (ISCAS, 2015)

Foreword. - Akihisa Yamada 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)