A 4-Mb CMOS SRAM with a PMOS thin-film-transistor load cell. - Takayuki Ootani; Shigeyuki Hayakawa; Masakazu Kakumu; Akira Aona; Masaaki Kinugawa; Hideki Takeuchi; Kazuhiro Noguchi; Tomoaki Yabe; Katsuhiko Sato; Kenji Maeguchi; Kiyofumi Ochii (IEEE J. Solid State Circuits, 1990)