Design for Testability for Complete Test Coverage. - Akira Motohara; Hideo Fujiwara (IEEE Des. Test, 1984)

An Approach to Fast Hierarchical Fault Simulation. - Akira Motohara; Motohide Murakami; Miki Urano; Yasuo Masuda; Masahide Sugano (DAC, 1988)

A State Traversal Algorithm Using a State Covariance Matrix. - Akira Motohara; Toshinori Hosokawa; Michiaki Muraoka; Hidetsugu Maekawa; Kazuhiro Kayashima; Yasuharu Shimeki; Seichi Shin (DAC, 1993)

Design for testability using register-transfer level partial scan selection. - Akira Motohara; Sadami Takeoka; Toshinori Hosokawa; Mitsuyasu Ohta; Yuji Takai; Michihiro Matsumoto; Michiaki Muraoka (ASP-DAC, 1995)

Practical Application of Automated Fault Diagnosis for Stuck-at, Bridging, and Measurement Condition Dependent Faults in Fully Scanned Sequential Circuits. - Reisuke Shimoda; Takaki Yoshida; Masafumi Watari; Yasuhiro Toyota; Kiyokazu Nishi; Akira Motohara (Asian Test Symposium, 1999)