Multi-Level Optimization for Large Scale ASICS. - Akira Nagoya; Yukihiro Nakamura; Kiyoshi Oguri; Ryo Nomura (ICCAD, 1990)

Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization. - Hiroshi Sawada; Takayuki Suyama; Akira Nagoya (ICCAD, 1995)

A new method to express functional permissibilities for LUT based FPGAs and its applications. - Shigeru Yamashita; Hiroshi Sawada; Akira Nagoya (ICCAD, 1996)

LUT-based FPGA Technology Mapping using Permissible Functions. - Takayuki Suyama; Hiroshi Sawada; Akira Nagoya (VLSI Design, 1996)

A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor. - Shinji Kimura; Yasufumi Itou; Makoto Hirao; Katsumasa Watanabe; Mitsuteru Yukishita; Akira Nagoya (CODES, 1997)

Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables. - Hiroshi Sawada; Shigeru Yamashita; Akira Nagoya (Great Lakes Symposium on VLSI, 1997)

Formulation of the Addition-Shift-Sequence Problem and Its Complexity. - Kaihiro Matsuura; Akira Nagoya (ISAAC, 1997)

New Methods to Find Optimal Non-Disjoint Bi-Decompositions. - Shigeru Yamashita; Hiroshi Sawada; Akira Nagoya (ASP-DAC, 1998)

Restructuring Logic Representations with Easily Detectable Simple Disjunctive Decompositions. - Hiroshi Sawada; Shigeru Yamashita; Akira Nagoya (DATE, 1998)

Soft Decision Maximum Likelihood Decoders for Binary Linear Block Codes Implemented on FPGAs (Abstract). - Hidehisa Nagano; Takayuki Suyama; Akira Nagoya (FPGA, 1998)

Acceleration of Linear Block Code Evaluations Using New Reconfigurable Computing Approach. - Hidehisa Nagano; Takayuki Suyama; Akira Nagoya (ASP-DAC, 1999)

Solving Satisfiability Problems on FPGAs Using Experimental Unit Propagation. - Takayuki Suyama; Makoto Yokoo; Akira Nagoya (CP, 1999)

A Method for Implementing Fractal Image Compression on Reconfigurable Architecture. - Akihiro Matsuura; Hidehisa Nagano; Akira Nagoya (FPGA, 1999)

An Integrated Approach for Synthesizing LUT Networks. - Shigeru Yamashita; Hiroshi Sawada; Akira Nagoya (Great Lakes Symposium on VLSI, 1999)

An Efficient Implementation Method of Fractal Image Compression on Dynamically Reconfigurable Architecture. - Hidehisa Nagano; Akihiro Matsuura; Akira Nagoya (IPPS/SPDP Workshops, 1999)

Solving Satisfiability Problems on FPGAs using Experimental Unit Propagation Heuristic. - Takayuki Suyama; Makoto Yokoo; Akira Nagoya (IPPS/SPDP Workshops, 1999)

Summation Algorithms on Constrained Reconfigurable Meshes. - Akihiro Matsuura; Akira Nagoya (ISPAN, 1999)

An efficient framework of using various decomposition methods to synthesize LUT networks and its evaluation. - Shigeru Yamashita; Hiroshi Sawada; Akira Nagoya (ASP-DAC, 2000)

A Threshold Logic-Based Reconfigurable Logic Element with a New Programming Technology. - Kazuo Aoyama; Hiroshi Sawada; Akira Nagoya; Kazuo Nakajima (FPL, 2000)

An Implementation of Longest Prefix Matching for IP Router on Plastic Cell Architecture. - Tsunemichi Shiozawa; Norbert Imlig; Kouichi Nagami; Kiyoshi Oguri; Akira Nagoya; Hiroshi Nakada (FPL, 2000)

SPFD: A new method to express functional flexibility. - Shigeru Yamashita; Hiroshi Sawada; Akira Nagoya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. - Ryusuke Konishi; Hideyuki Ito; Hiroshi Nakada; Akira Nagoya; Norbert Imlig; Tsunemichi Shiozawa; Minoru Inamori; Kouichi Nagami; Kiyoshi Oguri (ASYNC, 2001)

Scalable space/time-shared stream-processing on the run-time reconfigurable PCA architecture. - Norbert Imlig; Tsunemichi Shiozawa; Kouichi Nagami; Yoshiki Nakane; Ryusuke Konishi; Hideyuki Ito; Akira Nagoya (IPDPS, 2001)

Self-reorganising systems on VLSI circuits. - Hiroshi Nakada; Hideyuki Ito; Ryusuke Konishi; Akira Nagoya; Kiyoshi Oguri; Tsunemichi Shiozawa; Norbert Imlig (ISCAS (4), 2001)

Solving satisfiability problems using reconfigurable computing. - Takayuki Suyama; Makoto Yokoo; Hiroshi Sawada; Akira Nagoya (IEEE Trans. Very Large Scale Integr. Syst., 2001)

A Method of Mapping Finite State Machine into PCA Plastic Parts. - Minoru Inamori; Hiroshi Nakada; Ryusuke Konishi; Akira Nagoya; Kiyoshi Oguri (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA. - Kiyoshi Oguri; Yuichiro Shibata; Akira Nagoya (Asia-Pacific Computer Systems Architecture Conference, 2003)

Concept and implementation of run-time resource management system operating on autonomously reconfigurable architecture. - Yoshiki Nakane; Kouichi Nagami; Tsunemichi Shiozawa; Akira Nagoya (FPT, 2003)

Dynamically Reconfigurable Logic LSI: PCA-2. - Hideyuki Ito; Ryusuke Konishi; Hiroshi Nakada; Hideyuki Tsuboi; Yuichi Okuyama; Akira Nagoya (IEICE Trans. Inf. Syst., 2004)

Network Processor for High-Speed Network and Quick Programming. - Takahiro Murooka; Akira Nagoya; Toshiaki Miyazaki; Hiroyuki Ochi; Yukihiro Nakamura (J. Circuits Syst. Comput., 2007)

Acceleration of Analysis Processing on Decentralized Performance Profiling System Using Virtual Machines. - Masao Yamamoto; Kohta Nakashima; Toshihiro Yamauchi; Akira Nagoya; Hideo Taniguchi (CANDAR Workshops, 2018)

Convolutional neural network implementations using Vitis AI. - Akihiko Ushiroyama; Minoru Watanabe; Nobuya Watanabe; Akira Nagoya (CCWC, 2022)