Floorplan-Driven High-Level Synthesis for Distributed/Shared-Register Architectures. - Akira Ohchi; Shunitsu Kohara; Nozomu Togawa; Masao Yanagisawa; Tatsuo Ohtsuki (IPSJ Trans. Syst. LSI Des. Methodol., 2008)

Floorplan-Aware High-Level Synthesis for Generalized Distributed-Register Architectures. - Akira Ohchi; Nozomu Togawa; Masao Yanagisawa; Tatsuo Ohtsuki (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Performance-driven high-level synthesis with floorplan for GDR architectures and its evaluation. - Akira Ohchi; Nozomu Togawa; Masao Yanagisawa; Tatsuo Ohtsuki (ISCAS, 2010)