Scalable Overlay Network Deployment for Dynamic Collaborative Groups. - Norihito Fujita; Yuichi Ishikawa; Toshio Koide; Akira Tsukamoto (SAINT, 2005)

Magnetic Marker and High Tc Superconducting Quantum Interference Device for Biological Immunoassays. - Keiji Enpuku; Katsuhiro Inoue; Kohji Yoshinaga; Akira Tsukamoto; Kazuo Saitoh; Keiji Tsukada; Akihiko Kandori; Yoshinori Sugiura; Shigenori Hamaoka; Hiroyuki Morita; Hiroyuki Kuma; Naotaka Hamasaki (IEICE Trans. Electron., 2005)

Liquid-Phase Detection of Biological Targets with Magnetic Marker and Superconducting Quantum Interference Device. - Keiji Enpuku; Yuki Sugimoto; Yuya Tamai; Akira Tsukamoto; Takako Mizoguchi; Akihiko Kandori; Naoki Usuki; Hisao Kanzaki; Kohji Yoshinaga; Yoshinori Sugiura; Hiroyuki Kuma; Naotaka Hamasaki (IEICE Trans. Electron., 2009)

Recent Developments of High-Tc Electronic Devices with Multilayer Structures and Ramp-Edge Josephson Junctions. - Seiji Adachi; Akira Tsukamoto; Tsunehiro Hato; Joji Kawano; Keiichi Tanabe (IEICE Trans. Electron., 2012)

A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications. - Kesami Hagiwara; Tomoichi Hayashi; Shumpei Kawasaki; Fumio Arakawa; Oleg Endo; Hayato Nomura; Akira Tsukamoto; Duong Nguyen; Binh Nguyen; Anh Tran; Hoan Hyunh; Ikuo Kudoh; et al. (COOL CHIPS, 2018)

Analysis of Dielectrophoretic Properties of Cells by the use of the Uniform Field Gradient. - Shigeru Tada; Yui Omi; Masanori Eguchi; Noriko Nakai; Akira Tsukamoto (WAC, 2018)

Reboot-Oriented IoT: Life Cycle Management in Trusted Execution Environment for Disposable IoT devices. - Kuniyasu Suzaki; Akira Tsukamoto; Andy Green; Mohammad Mannan (ACSAC, 2020)

Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors. - Trong-Thuc Hoang; Ckristian Duran; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (ISCAS, 2020)

Library Implementation and Performance Analysis of GlobalPlatform TEE Internal API for Intel SGX and RISC-V Keystone. - Kuniyasu Suzaki; Kenta Nakajima; Tsukasa Oi; Akira Tsukamoto (TrustCom, 2020)

Quick Boot of Trusted Execution Environment With Hardware Accelerators. - Trong-Thuc Hoang; Ckristian Duran; Duc-Thinh Nguyen-Hoang; Duc-Hung Le; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2020)

Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB). - Trong-Thuc Hoang; Ckristian Duran; Khai-Duy Nguyen; Tuan-Kiet Dang; Quynh Nguyen Quang Nhu; Phuc Hong Than; Xuan-Tu Tran; Duc-Hung Le; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEICE Electron. Express, 2020)

An in vitro model of temporal enhancement of epithelium barrier permeability by low-energy shock waves without contrast agents. - Yuki Monden; Akira Tsukamoto; Takashi Ushida; Etsuko Kobayashi; Keiichi Nakagawa; Ichiro Sakuma (Medical Biol. Eng. Comput., 2020)

System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture. - Trong-Thuc Hoang; Ckristian Duran; Ronaldo Serrano; Marco Sarmiento; Khai-Duy Nguyen; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (HCS, 2021)

ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3. - Ronaldo Serrano; Ckristian Duran; Trong-Thuc Hoang; Marco Sarmiento; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (ISOCC, 2021)

Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks. - Ba-Anh Dao; Trong-Thuc Hoang; Anh-Tien Le; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2021)

Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure. - Ba-Anh Dao; Trong-Thuc Hoang; Anh-Tien Le; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2021)

A Real-Time Cache Side-Channel Attack Detection System on RISC-V Out-of-Order Processor. - Anh-Tien Le; Trong-Thuc Hoang; Ba-Anh Dao; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2021)

A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse. - Ronaldo Serrano; Ckristian Duran; Trong-Thuc Hoang; Marco Sarmiento; Khai-Duy Nguyen; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2021)

TS-Perf: General Performance Measurement of Trusted Execution Environment and Rich Execution Environment on Intel SGX, Arm TrustZone, and RISC-V Keystone. - Kuniyasu Suzaki; Kenta Nakajima; Tsukasa Oi; Akira Tsukamoto (IEEE Access, 2021)

Spectre attack detection with Neutral Network on RISC-V processor. - Anh-Tien Le; Trong-Thuc Hoang; Ba-Anh Dao; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (ISCAS, 2022)

High-performance Multi-function HMAC-SHA2 FPGA Implementation. - Binh Kieu-Do-Nguyen; Trong-Thuc Hoang; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (NEWCAS, 2022)

Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling. - Trong-Thuc Hoang; Ckristian Duran; Ronaldo Serrano; Marco Sarmiento; Khai-Duy Nguyen; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2022)

A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse. - Ronaldo Serrano; Ckristian Duran; Marco Sarmiento; Trong-Thuc Hoang; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (IEEE Access, 2022)

A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment. - Anh-Tien Le; Trong-Thuc Hoang; Ba-Anh Dao; Akira Tsukamoto; Kuniyasu Suzaki; Cong-Kha Pham (Comput. Electr. Eng., 2023)