A Novel Clock Distribution System for CMOS VLSI. - Kenichi Ishibashi; Takehisa Hayashi; Toshio Doi; Noboru Masuda; Akira Yamagiwa; Toshihiro Okabe (ICCD, 1993)

110-GB/s simultaneous bidirectional transceiver logic synchronized with a system clock. - Toshiro Takahashi; Takashi Muto; Yuji Shirai; Fumihiko Shirotori; Yoshifumi Takada; Akira Yamagiwa; Akira Nishida; Atsuo Hotta; Tadashi Kiyuna (IEEE J. Solid State Circuits, 1999)

Simultaneous bidirectional transceiver logic. - Kenichi Ishibashi; Tsutomu Goto; Takehisa Hayashi; Tetsuhiko Okada; Akira Yamagiwa; Masabumi Shibata; Kazuhiro Akimoto; Naoki Hamanaka; Toshiro Takahashi; Akio Koyama; Tatsuhiro Aida (IEEE Micro, 1999)