Tagged communication and synchronization memory for multiprocessor-on-a-chip. - Masahiko Iwane; Akira Yamawaki 002; Makoto Tanaka (Syst. Comput. Jpn., 2001)

Organization of Shared Memory with Synchronization for Multiprocessor-on-a-chip. - Akira Yamawaki 002; Masahiko Iwane (ICPADS, 2002)

Evaluation of mechanisms introduced to improve performance of TSVM cache. - Akira Yamawaki 002; Masahiko Iwane (Parallel and Distributed Computing and Networks, 2004)

An efficient parallel processing using a cache memory with synchronization on a Soc-multiprocessor. - Akira Yamawaki 002; Masahiko Iwane (Circuits, Signals, and Systems, 2005)

Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor. - Akira Yamawaki 002; Masahiko Iwane (ISPAN, 2005)

A Programmable Load/Store Unit on C-based Hardware Design for FPGA. - Akira Yamawaki 002; Masahiko Iwane (FPT, 2007)

An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip. - Akira Yamawaki 002; Masahiko Iwane (ICPADS, 2007)

An FPGA implementation of a DWT with 5/3 filter using semi-programmable hardware. - Akira Yamawaki 002; Kazuharu Morita; Masahiko Iwane (APCCAS, 2008)

An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware. - Akira Yamawaki 002; Seiichi Serikawa; Masahiko Iwane (ERSA, 2009)

An intermediate hardware model with load/store unit for C to FPGA. - Akira Yamawaki 002; Masahiko Iwane (FPGA, 2009)

An Architecture of Prototyping System for Dynamic Partial Reconfiguration on FPGA. - Akira Yamawaki 002; Seiichi Serikawa (ERSA, 2010)

An Efficient Hardware Architecture from C Program with Memory Access to Hardware. - Akira Yamawaki 002; Seiichi Serikawa; Masahiko Iwane (ICCSA (2), 2010)

A method using the same light sensor for detecting multiple events near a window in crimes involving intrusion into a home. - Akira Yamawaki 002; Takayuki Katakami; Yuhki Kitazono; Seiichi Serikawa (Artif. Life Robotics, 2010)

A generic SoC platform using DPR feature to improve social life. - Hiroyuki Tanabe; Kohei Miyata; Akira Yamawaki 002; Seiichi Serikawa (SII, 2012)

A lightweight sensing method of tooth-touch sound for disabled person using remote controller. - Akira Yamawaki 002; Seiichi Serikawa (Artif. Life Robotics, 2012)

Underwater optical image dehazing using guided trigonometric bilateral filtering. - Huimin Lu 001; Yujie Li 001; Lifeng Zhang; Akira Yamawaki 002; Shiyuan Yang; Seiichi Serikawa (ISCAS, 2013)

A sensor node architecture with zero standby power on wireless sensor network. - Akira Yamawaki 002; Mayu Yamanaka; Seiichi Serikawa (Artif. Life Robotics, 2015)

Identify a Specified Fish Species by the Co-occurrence Matrix and AdaBoost. - Lifeng Zhang; Akira Yamawaki 002; Seiichi Serikawa (Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, 2015)

Battery Life Estimation of Sensor Node with Zero Standby Power Consumption. - Akira Yamawaki 002; Seiichi Serikawa (CSE/EUC/DCABES, 2016)

An Evaluation of Burst Transfer Inferred by a High-level Synthesis Tool. - Yuki Yamagata; Akira Yamawaki 002 (TENCON, 2018)

Describing Methods for High-level Synthesis of Histogram Generation and Their Evaluation. - Moena Yamawasaki; Akira Yamawaki 002 (TENCON, 2018)

A Describing Method of an Image Processing Software in C for a High-Level Synthesis Considering a Function Chaining. - Akira Yamawaki 002; Seiichi Serikawa (IEICE Trans. Inf. Syst., 2018)

Development of Filled Circle Drawing in High-Level Synthesis Oriented Game Programming Library. - Yuki Yamagata; Akira Yamawaki 002 (PDCAT, 2019)

Effect of Parallel Processing by Duplicating Histogram in Automatic Image Binarization for High-Level Synthesis. - Moena Yamasaki; Akira Yamawaki 002 (PDCAT, 2019)

Proposal of an ultrasonic sensor array with flexible and scalable organization. - Yuichi Morita; Sota Kono; Akira Yamawaki 002 (Artif. Life Robotics, 2019)

A performance evaluation of read/write burst transfer by high-level synthesizable software for the alpha blending processing. - Yuki Yamagata; Akira Yamawaki 002 (Artif. Life Robotics, 2020)

Duplicating same argument of function to realize efficient hardware for high-level synthesis. - Moena Yamasaki; Akira Yamawaki 002 (Artif. Life Robotics, 2020)

Omnidirectional Background Scrolling in High-Level Synthesis Oriented Game Programing Library. - Kilryong Lee; Akira Yamawaki 002 (TENCON, 2021)

Development of High Performance Hardware by High-Level Synthesis of Median-Based Dynamic Background Subtraction Method with Multiple Line Buffers. - Kohei Shinyamada; Akira Yamawaki 002 (TENCON, 2021)

Memory Access Optimization for Former Process of Pencil Drawing Style Image Conversion in High-Level Synthesis. - Honoka Tani; Akira Yamawaki 002 (PDCAT, 2022)

Background scrolling in high-level synthesis oriented game programing library. - Kilryong Lee; Akira Yamawaki 002 (Artif. Life Robotics, 2022)

Development of a real camera system with high-level synthesised hardware of median-based dynamic background subtraction. - Kohei Shinyamada; Akira Yamawaki 002 (Artif. Life Robotics, 2022)

Development of a general purpose verification environment for high-level-synthesis image processing hardware with support for dynamic partial reconfiguration. - Atsushi Shojima; Akira Yamawaki 002 (Artif. Life Robotics, 2022)

An investigation of software describing methods to design dual background scrolling hardware in high-level synthesis. - Kilryong Lee; Akira Yamawaki 002 (Artif. Life Robotics, 2023)

Hardware Implementation of Spherical Diffuse Reflection in Ray-Casting Using High Level-Synthesis. - Kazuki Kurata; Akira Yamawaki 002 (ISCIT, 2024)

Light-weight color image conversion like pencil drawing for high-level synthesized hardware. - Honoka Tani; Akira Yamawaki 002 (Artif. Life Robotics, 2024)