A 75-µW 2.4 GHz Wake-up Receiver in 65-nm CMOS for Neonatal Healthcare Application. - Kundan Kumar; Raghunath K. P; Akshay Muraleedharan; Javed S. Gaggatur; Gaurab Banerjee (VLSID, 2019)

Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA. - T. Gokulan; Akshay Muraleedharan; Kuruvilla Varghese (DSD, 2020)