A versatile and powerful chip for real-time motion estimation. - Alain Artieri; Francis Jutand (ICASSP, 1989)

A new VLSI architecture for large kernel real time convolution. - Francis Jutand; Nicolas Demassieux; Alain Artieri (ICASSP, 1990)

Design of a low-power 32 K CMOS programmable delay-line memory. - Kobchai Dejhan; Nicolas Demassieux; Oswald Colavin; Arnaud Galisson; Alain Artieri; Francis Jutand (IEEE J. Solid State Circuits, 1990)

Exploiting error-correcting codes for cache minimum supply voltage reduction while maintaining coverage for radiation-induced soft errors. - Alex Park 002; Venkat Narayanan; Keith A. Bowman; Francois Atallah; Alain Artieri; Sei Seung Yoon; Kendrick Yuen; David Hansquine (CICC, 2014)

Trading-off on-die observability for cache minimum supply voltage reduction in system-on-chip (SoC) processors. - Keith A. Bowman; Alex Park 002; Venkat Narayanan; Francois Atallah; Alain Artieri; Sei Seung Yoon; Kendrick Yuen; David Hansquine (ITC, 2014)