New theorems on the equations of nonlinear DC transistor networks. - Alan N. Willson Jr. (Bell Syst. Tech. J., 1970)

Design of an on-line multiply-add module for recursive digital filters. - Ralph Hans Brackert Jr.; Milos D. Ercegovac; Alan N. Willson Jr. (IEEE Symposium on Computer Arithmetic, 1989)

The design of low-complexity in linear-phase FIR filter banks using powers-of-two coefficients with an application to subband image coding. - Bor-Rong Horng; Henry Samueli; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. Video Technol., 1991)

A theorem providing bounds on digital filter scaling factors. - R. H. Brackert; Henry John Orchard; Alan N. Willson Jr. (IEEE Trans. Signal Process., 1991)

A programmable digital filter IC employing multiple processors on a single chip. - Alan Y. Kwentus; Michael J. Werter; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. Video Technol., 1992)

Lagrange multiplier approaches to the design of two-channel perfect-reconstruction linear-phase FIR filter banks. - Bor-Rong Horng; Alan N. Willson Jr. (IEEE Trans. Signal Process., 1992)

On the relationship between negatve differential resistance and stability for nonlinear one-ports. - Michael M. Green; Alan N. Willson Jr. (ISCAS, 1993)

An efficient 175 MHz programmable FIR digital filter. - Kei-Yong Khoo; Alan Y. Kwentus; Alan N. Willson Jr. (ISCAS, 1993)

High-Performance IIR QMF Banks for Speech Subband Coding. - Zhongnong Jiang; Abeer A. Alwan; Alan N. Willson Jr. (ISCAS, 1994)

Low Power CMOS Clock Buffer. - Kei-Yong Khoo; Alan N. Willson Jr. (ISCAS, 1994)

A New Approach to the Design of Three-Channel Perfect-Reconstruction Linear-Phase FIR Filter Banks. - Parviz Saghizadeh; Alan N. Willson Jr. (ISCAS, 1994)

An improvement to the Powell and Chau linear phase IIR filters. - Alan N. Willson Jr.; Henry John Orchard (IEEE Trans. Signal Process., 1994)

An architecture for high-performance/small-area multipliers for use in digital filtering applications. - Alan Y. Kwentus; Hing-Tsun Hung; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 1994)

Single-transistor transparent-latch clocking. - Kei-Yong Khoo; Alan N. Willson Jr. (ARVLSI, 1995)

A generic approach to the design of M-channel uniform-band perfect-reconstruction linear-phase FIR filter banks. - Parviz Saghizadeh; Alan N. Willson Jr. (ICASSP, 1995)

An Improved Polynomial-Time Algorithm for Designing Digital Filters with Power-of-Two Coefficients. - Chao-Liang Chen; Kei-Yong Khoo; Alan N. Willson Jr. (ISCAS, 1995)

A High Accuracy Predictive Logarithmic Motion Estimation Algorithm for Video Coding. - Michael C. Chen; Alan N. Willson Jr. (ISCAS, 1995)

Automated Programming of a Ring-Structured Multiprocessor Digital Filter IC. - Michael J. Werter; Alan N. Willson Jr. (ISCAS, 1995)

Charge recovery on a databus. - Kei-Yong Khoo; Alan N. Willson Jr. (ISLPD, 1995)

An algorithm for identifying unstable operating points using SPICE. - Michael M. Green; Alan N. Willson Jr. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

A 100 MHz 2-D 8×8 DCT/IDCT processor for HDTV applications. - Avanindra Madisetti; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. Video Technol., 1995)

Design and implementation of efficient pipelined IIR digital filters. - Zhongnong Jiang; Alan N. Willson Jr. (IEEE Trans. Signal Process., 1995)

Motion vector optimization of control grid interpolation and overlapped block motion compensation using iterative dynamic programming. - Michael C. Chen; Alan N. Willson Jr. (EUSIPCO, 1996)

Adaptive spectral estimation using the conjugate gradient algorithm. - Pi Sheng Chang; Alan N. Willson Jr. (ICASSP, 1996)

Rate-distortion optimal motion estimation algorithm for video coding. - Michael C. Chen; Alan N. Willson Jr. (ICASSP, 1996)

Cycle-Based Timing Simulations Using Event-Stream. - Kei-Yong Khoo; Alan N. Willson Jr. (ICCD, 1996)

Design and optimization of a differentially coded variable block size motion compensation system. - Michael C. Chen; Alan N. Willson Jr. (ICIP (3), 1996)

A programmable FIR digital filter using CSD coefficients. - Kei-Yong Khoo; Alan Y. Kwentus; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 1996)

Conjugate gradient method for adaptive direction-of-arrival estimation of coherent signals. - Pi Sheng Chang; Alan N. Willson Jr. (ICASSP, 1997)

A pipelined/interleaved IIR digital filter architecture. - Zhongnong Jiang; Alan N. Willson Jr. (ICASSP, 1997)

A flexible hardware-oriented fast algorithm for motion estimation. - Fengqi Yu; Alan N. Willson Jr. (ICASSP, 1997)

A Spatial and Temporal Motion Vector Coding Algorithm for Low-Bit-Rate Video Coding. - Michael C. Chen; Alan N. Willson Jr. (ICIP (2), 1997)

Application of filter sharpening to cascaded integrator-comb decimation filters. - Alan Y. Kwentus; Zhongnong Jiang; Alan N. Willson Jr. (IEEE Trans. Signal Process., 1997)

A design method for half-band filters. - Alan N. Willson Jr.; Henry John Orchard (EUSIPCO, 1998)

Low-power Viterbi decoder for CDMA mobile terminals. - Inyup Kang; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 1998)

Rate-distortion optimal motion estimation algorithms for motion-compensated transform video coding. - Michael C. Chen; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. Video Technol., 1998)

A new approach to the design of critically sampled M-channel uniform-band perfect-reconstruction linear-phase FIR filter banks. - Parviz Saghizadeh; Alan N. Willson Jr. (IEEE Trans. Signal Process., 1998)

A variable-rate filtering system for digital communications. - Larry A. Wasserman; Alan N. Willson Jr. (ICASSP, 1999)

Bit-level arithmetic optimization for carry-save additions. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (ICCAD, 1999)

Design of an improved interpolation filter using a trigonometric polynomial. - Dengwei Fu; Alan N. Willson Jr. (ISCAS (4), 1999)

A CMOS pipelined carry-save array using true single-phase single-transistor-latch clocking. - Kei-Yong Khoo; Chao-Liang Chen; Alan N. Willson Jr. (ISCAS (1), 1999)

Improved-Booth encoding for low-power multipliers. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (ISCAS (1), 1999)

Hardware efficient architectures for coupled-form IIR filters. - Fengqi Yu; Alan N. Willson Jr. (ISCAS (3), 1999)

A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range. - Avanindra Madisetti; Alan Y. Kwentus; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 1999)

The use of carry-save representation in joint module selection and retiming. - Zhan Yu; Kei-Yong Khoo; Alan N. Willson Jr. (DAC, 2000)

Efficient implementation of FIR filters using bit-level optimized carry-save additions. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (EUSIPCO, 2000)

Joint module selection and retiming with carry-save representation. - Zhan Yu; Kei-Yong Khoo; Alan N. Willson Jr. (EUSIPCO, 2000)

A fast synchronizer for burst modems with simultaneous symbol timing and carrier phase estimations. - Dengwei Fu; Alan N. Willson Jr. (ISCAS, 2000)

Motion-vector optimization of control grid interpolation and overlapped block motion compensation using iterated dynamic programming. - Michael C. Chen; Alan N. Willson Jr. (IEEE Trans. Image Process., 2000)

Analysis of conjugate gradient algorithms for adaptive filtering. - Pi Sheng Chang; Alan N. Willson Jr. (IEEE Trans. Signal Process., 2000)

Signal Representation Guided Synthesis Using Carry-Save Adders For Synchronous Data-path Circuits. - Zhan Yu; Meng-Lin Yu; Alan N. Willson Jr. (DAC, 2001)

Local stability analysis and systolic implementation of a subspace tracking algorithm. - Fan Xu 006; Alan N. Willson Jr. (ICASSP, 2001)

Multirate digital squarer architectures. - Fengqi Yu; Alan N. Willson Jr. (ICECS, 2001)

Design of optimal hybrid form FIR filter. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (ISCAS (2), 2001)

Local stability analysis and hardware realization of an eigenvector tracking algorithm. - Fan Xu 006; Alan N. Willson Jr. (ISCAS (2), 2001)

A low power adaptive filter using dynamic reduced 2's-complement representation. - Zhan Yu; Meng-Lin Yu; Kamran Azadet; Alan N. Willson Jr. (CICC, 2002)

A ring-processor based blind beamformer design for use in wireless sensor networks. - Fan Xu 006; Guichang Zhong; D. D. Richard III; Alan N. Willson Jr. (ISCAS (4), 2002)

The use of reduced two's-complement representation in low-power DSP design. - Zhan Yu; Meng-Lin Yu; Kamran Azadet; Alan N. Willson Jr. (ISCAS (1), 2002)

A 415 MHz direct digital quadrature modulator in 0.25-μm CMOS. - Yanlin Wu; Dengwei Fu; Alan N. Willson Jr. (CICC, 2003)

A 400-MHz processor for the conversion of rectangular to polar coordinates in 0.25-μm CMOS. - David D. Hwang; Dengwei Fu; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 2003)

A 300-MHz quadrature direct digital synthesizer/mixer in 0.25-μm CMOS. - Arthur Torosyan; Dengwei Fu; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 2003)

Optimal joint module-selection and retiming with carry-save representation. - Zhan Yu; Kei-Yong Khoo; Alan N. Willson Jr. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

A 625 MHz to 10 GHz clock multiplier for re-transmitting 10 Gb/s serial data. - Chih-Wei Yao; Hiep T. Pham; Alan N. Willson Jr. (CICC, 2004)

An energy-efficient reconfigurable FFT/IFFT processor based on a multi-processor ring. - Guichang Zhong; Fan Xu 006; Alan N. Willson Jr. (EUSIPCO, 2004)

A new interpolated symbol timing recovery method. - Xiong Liu; Alan N. Willson Jr. (ISCAS (2), 2004)

On optimal IFIR filter design. - Alireza Mehrnia; Alan N. Willson Jr. (ISCAS (3), 2004)

An energy-efficient reconfigurable angle-rotator architecture. - Guichang Zhong; Fan Xu 006; Dengwei Fu; Alan N. Willson Jr. (ISCAS (3), 2004)

In Memoriam. - Alan N. Willson Jr.; Gabor C. Temes; Asad A. Abidi (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Efficient hardware architectures for eigenvector and signal subspace estimation. - Fan Xu 006; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Efficient VLSI implementation of N/N integer division. - Kei-Yong Khoo; Alan N. Willson Jr. (ISCAS (1), 2005)

Trigonometric polynomial interpolation for timing recovery. - Dengwei Fu; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Analysis and VLSI Realization of a Blind Beamforming Algorithm. - Fan Xu 006; Guichang Zhong; Alan N. Willson Jr. (J. VLSI Signal Process., 2005)

Energy circulation quadrature LC-VCO. - Chih-Wei Yao; Alan N. Willson Jr. (ISCAS, 2006)

A phase-noise reduction technique for quadrature LC-VCO with phase-to-amplitude noise conversion. - Chih-Wei Yao; Alan N. Willson Jr. (ISSCC, 2006)

A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring. - Guichang Zhong; Fan Xu 006; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 2006)

A two-stage angle-rotation architecture and its error analysis for efficient digital mixer implementation. - Dengwei Fu; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Low-latency Memory-efficient 150-Mbps Turbo FEC Encoder and Decoder. - Tzu-Chieh Kuo; Alan N. Willson Jr. (ISCAS, 2007)

The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers. - Chia-Yu Yao; Alan N. Willson Jr. (ISCAS, 2007)

An Energy-efficient Reconfigurable Viterbi Decoder on a Programmable Multiprocessor. - Guichang Zhong; Alan N. Willson Jr. (ISCAS, 2007)

A flexible decoder IC for WiMAX QC-LDPC codes. - Tzu-Chieh Kuo; Alan N. Willson Jr. (CICC, 2008)

A high-speed and high-accuracy interpolator for digital modems. - Nicola Petra; Alan N. Willson Jr. (ICECS, 2008)

A programmable 25 MHz to 6 GHz rational-K/L frequency synthesizer with digital Kvco compensation. - Jae Y. Kim; Chih-Wei Yao; Alan N. Willson Jr. (ISCAS, 2008)

Enhanced delta-based layered decoding of WiMAX QC-LDPC codes. - Tzu-Chieh Kuo; Alan N. Willson Jr. (ISCAS, 2008)

The design of asymmetrical square-root pulse-shaping filters with wide eye-openings. - Chia-Yu Yao; Alan N. Willson Jr. (ISCAS, 2008)

Frequency Synthesis with Arbitrary Input Clock Rate and Rational K/L Multiplier Ratio. - Chih-Wei Yao; Alan N. Willson Jr. (ISCAS, 2009)

A Programmable 25-MHz to 6-GHz Kvco Compensation. - Jae Y. Kim; Chih-Wei Yao; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A low-supply PLL with Enhanced Cascode Compensation and a low-supply-sensitivity CCO. - Xiong Liu; Alan N. Willson Jr. (CICC, 2010)

A 1.2 Gb/s recursive polyphase cascaded integrator-comb prefilter for high speed digital decimation filters in 0.18-μm CMOS. - Xiong Liu; Alan N. Willson Jr. (ISCAS, 2010)

A 70dB SNDR 10-MHz BW hybrid delta-sigma/pipeline ADC in 0.18-µm CMOS. - Xiong Liu; Alan N. Willson Jr. (SoCC, 2010)

Desensitized Half-Band Filters. - Alan N. Willson Jr. (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A direct digital frequency synthesizer with minimized tuning latency of 12ns. - Alan N. Willson Jr.; Mukund Ojha; Shilpa Agarwal; Thriven Lai; Tzu-Chieh Kuo (ISSCC, 2011)

A 275 MHz quadrature modulator in 0.18-µm CMOS. - Shilpa Agarwal; Tzu-Chieh Kuo; Alan N. Willson Jr. (ISCAS, 2012)

The Design of Hybrid Symmetric-FIR/Analog Pulse-Shaping Filters. - Chia-Yu Yao; Alan N. Willson Jr. (IEEE Trans. Signal Process., 2012)

A 2.8-3.2-GHz Fractional- N Digital PLL With ADC-Assisted TDC and Inductively Coupled Fine-Tuning DCO. - Chih-Wei Yao; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 2013)

A 1-GHz direct digital frequency synthesizer in an FPGA. - Matt Bergeron; Alan N. Willson Jr. (ISCAS, 2014)

Further Desensitized FIR Halfband Filters. - Alireza Mehrnia; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Optimal Factoring of FIR Filters. - Alireza Mehrnia; Alan N. Willson Jr. (IEEE Trans. Signal Process., 2015)

Efficient Halfband FIR Filter Structures for RF and IF Data Converters. - Alireza Mehrnia; Ming Dai; Alan N. Willson Jr. (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

FIR Filter Design via Extended Optimal Factoring. - Alireza Mehrnia; Alan N. Willson Jr. (IEEE Trans. Signal Process., 2016)

Optimally Factored IFIR Filters. - Alireza Mehrnia; Alan N. Willson Jr. (Circuits Syst. Signal Process., 2019)