Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology. - Denis Flandre; Albert Viviani; Jean-Paul Eggermont; Bernard Gentinne; Paul G. A. Jespers (IEEE J. Solid State Circuits, 1997)

Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications. - Laurent Demeus; Vincent Dessard; Albert Viviani; Stephane Adriaensen; Denis Flandre (IEEE Trans. Ind. Electron., 2001)