A Flexible Model for Evaluating the Behavior of Hardware/Software Systems. - Alberto Allara; S. Filipponi; Fabio Salice; William Fornaciari; Donatella Sciuto (CODES, 1997)

Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation. - Alberto Allara; S. Filipponi; William Fornaciari; Fabio Salice; Donatella Sciuto (ICCD, 1997)

ATM Cell Modelling using Objective VHDL. - Alberto Allara; Massimo Bombana; Patrizia Cavalloro; Wolfgang Nebel; Wolfram Putzke-Röming; Martin Radetzki (ASP-DAC, 1998)

A Model for System-Level Timed Analysis and Profiling. - Alberto Allara; William Fornaciari; Fabio Salice; Donatella Sciuto (DATE, 1998)

System-level performance estimation strategy for sw and hw. - Alberto Allara; Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (ICCD, 1998)

A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller. - Alberto Allara; Massimo Bombana; William Fornaciari; Fabio Salice (IEEE Des. Test Comput., 2000)