Time-to-digital converter with 3-ps resolution and digital linearization algorithm. - Marco Zanuso; Salvatore Levantino; Alberto Puggelli; Carlo Samori; Andrea L. Lacaita (ESSCIRC, 2010)

CalCS: SMT solving for non-linear convex constraints. - Pierluigi Nuzzo 002; Alberto Puggelli; Sanjit A. Seshia; Alberto L. Sangiovanni-Vincentelli (FMCAD, 2010)

Are logic synthesis tools robust? - Alberto Puggelli; Tobias Welp; Andreas Kuehlmann; Alberto L. Sangiovanni-Vincentelli (DAC, 2011)

A routing-algorithm-aware design tool for indoor wireless sensor networks. - Alberto Puggelli; Mohammad Mostafizur Rahman Mozumdar; Alberto L. Sangiovanni-Vincentelli; Luciano Lavagno (ICNC, 2012)

Polynomial-Time Verification of PCTL Properties of MDPs with Convex Uncertainties. - Alberto Puggelli; Wenchao Li 001; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia (CAV, 2013)

BAG: a designer-oriented integrated framework for the development of AMS circuit generators. - John Crossley; Alberto Puggelli; Hanh-Phuc Le; B. Yang; R. Nancollas; Kwangmo Jung; Lingkai Kong; Nathan Narevsky; Yue Lu 007; Nicholas Sutardja; E. J. An; Alberto L. Sangiovanni-Vincentelli; et al. (ICCAD, 2013)

Data-Driven Probabilistic Modeling and Verification of Human Driver Behavior. - Dorsa Sadigh; Katherine Rose Driggs-Campbell; Alberto Puggelli; Wenchao Li 001; Victor Shia; Ruzena Bajcsy; Alberto L. Sangiovanni-Vincentelli; S. Shankar Sastry; Sanjit A. Seshia (AAAI Spring Symposia, 2014)

Robust strategy synthesis for probabilistic systems applied to risk-limiting renewable-energy pricing. - Alberto Puggelli; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia (EMSOFT, 2014)

Secure State Estimation Under Sensor Attacks: A Satisfiability Modulo Theory Approach. - Yasser Shoukry; Pierluigi Nuzzo 002; Alberto Puggelli; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia; Paulo Tabuada (CoRR, 2014)

Formal Techniques for the Verification and Optimal Control of Probabilistic Systems in the Presence of Modeling Uncertainties. - Alberto Puggelli (2014)

Sound and complete state estimation for linear dynamical systems under sensor attacks using Satisfiability Modulo Theory solving. - Yasser Shoukry; Alberto Puggelli; Pierluigi Nuzzo 002; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia; Paulo Tabuada (ACC, 2015)

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. - Yunsup Lee; Brian Zimmer; Andrew Waterman; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Henry Cook; Rimas Avizienis; et al. (Hot Chips Symposium, 2015)

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. - Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Hanh-Phuc Le; Po-Hung Chen; Nicholas Sutardja; et al. (VLSIC, 2015)

Routing-Aware Design of Indoor Wireless Sensor Networks Using an Interactive Tool. - Alberto Puggelli; Mohammad Mostafizur Rahman Mozumdar; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (IEEE Syst. J., 2015)

On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC. - Martin Cochet; Alberto Puggelli; Ben Keller; Brian Zimmer; Milovan Blagojevic; Sylvain Clerc; Philippe Roche; Jean-Luc Autran; Borivoje Nikolic (A-SSCC, 2016)

Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. - Ben Keller; Martin Cochet; Brian Zimmer; Yunsup Lee; Milovan Blagojevic; Jaehwa Kwak; Alberto Puggelli; Stevo Bailey; Pi-Feng Chiu; Daniel Palmer Dabbelt; Colin Schmidt 001; Elad Alon; et al. (ESSCIRC, 2016)

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. - Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Steven Bailey; Milovan Blagojevic; Pi-Feng Chiu; Hanh-Phuc Le; Po-Hung Chen; Nicholas Sutardja; et al. (IEEE J. Solid State Circuits, 2016)

An Agile Approach to Building RISC-V Microprocessors. - Yunsup Lee; Andrew Waterman; Henry Cook; Brian Zimmer; Ben Keller; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Rimas Avizienis; et al. (IEEE Micro, 2016)

A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. - Ben Keller; Martin Cochet; Brian Zimmer; Jaehwa Kwak; Alberto Puggelli; Yunsup Lee; Milovan Blagojevic; Stevo Bailey; Pi-Feng Chiu; Daniel Palmer Dabbelt; Colin Schmidt 001; Elad Alon; et al. (IEEE J. Solid State Circuits, 2017)

Secure State Estimation for Cyber-Physical Systems Under Sensor Attacks: A Satisfiability Modulo Theory Approach. - Yasser Shoukry; Pierluigi Nuzzo 002; Alberto Puggelli; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia; Paulo Tabuada (IEEE Trans. Autom. Control., 2017)