A correlation-based design space exploration methodology for multi-processor systems-on-chip. - Giovanni Mariani; Aleksandar Brankovic; Gianluca Palermo; Jovana Jovic; Vittorio Zaccaria; Cristina Silvano (DAC, 2010)

Performance analysis and predictability of the software layer in dynamic binary translators/optimizers. - Aleksandar Brankovic; Kyriakos Stavrou; Enric Gibert; Antonio González 001 (Conf. Computing Frontiers, 2013)

Accurate off-line phase classification for HW/SW co-designed processors. - Aleksandar Brankovic; Kyriakos Stavrou; Enric Gibert; Antonio González 001 (Conf. Computing Frontiers, 2014)

Warm-Up Simulation Methodology for HW/SW Co-Designed Processors. - Aleksandar Brankovic; Kyriakos Stavrou; Enric Gibert; Antonio González 001 (CGO, 2014)

Performance simulation methodologies for hardware/software co-designed processors. - Aleksandar Brankovic (2015)

Quantitative characterization of the software layer of a HW/SW co-designed processor. - José Cano 001; Rakesh Kumar 003; Aleksandar Brankovic; Demos Pavlou; Kyriakos Stavrou; Enric Gibert; Alejandro Martínez; Antonio González 001 (IISWC, 2016)

HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation. - Rakesh Kumar 003; José Cano 001; Aleksandar Brankovic; Demos Pavlou; Kyriakos Stavrou; Enric Gibert; Alejandro Martínez; Antonio Gonzalez (ISPASS, 2017)