Generation and Exploration of Layouts for Area-Efficient Barrel Shifters. - Alen Bardizbanyan; Kasyab P. Subramaniyan; Per Larsson-Edefors (ISVLSI, 2010)

Reconfigurable Instruction Decoding for a Wide-Control-Word Processor. - Alen Bardizbanyan; Magnus Själander; Per Larsson-Edefors (IPDPS Workshops, 2011)

Configurable RTL model for level-1 caches. - Vahid Saljooghi; Alen Bardizbanyan; Magnus Själander; Per Larsson-Edefors (NORCHIP, 2012)

Improving data access efficiency by using a tagless access buffer (TAB). - Alen Bardizbanyan; Peter Gavin; David B. Whalley; Magnus Själander; Per Larsson-Edefors; Sally A. McKee; Per Stenström (CGO, 2013)

Speculative tag access for reduced energy dissipation in set-associative L1 data caches. - Alen Bardizbanyan; Magnus Själander; David B. Whalley; Per Larsson-Edefors (ICCD, 2013)

Designing a practical data filter cache to improve both energy efficiency and performance. - Alen Bardizbanyan; Magnus Själander; David B. Whalley; Per Larsson-Edefors (ACM Trans. Archit. Code Optim., 2013)

Reducing set-associative L1 data cache energy by early load data dependence detection (ELD3). - Alen Bardizbanyan; Magnus Själander; David B. Whalley; Per Larsson-Edefors (DATE, 2014)

Exploring early and late ALUs for single-issue in-order pipelines. - Alen Bardizbanyan; Per Larsson-Edefors (ICCD, 2015)

Improving Data Access Efficiency by Using Context-Aware Loads and Stores. - Alen Bardizbanyan; Magnus Själander; David B. Whalley; Per Larsson-Edefors (LCTES, 2015)

Data Access Techniques for Enhanced Energy Efficiency and Performance in In-order Pipelines. - Alen Bardizbanyan (2015)

Practical way halting by speculatively accessing halt tags. - Daniel Moreau; Alen Bardizbanyan; Magnus Själander; David B. Whalley; Per Larsson-Edefors (DATE, 2016)

Logic filter cache for wide-VDD-range processors. - Alen Bardizbanyan; Oskar Andersson; Joachim Neves Rodrigues; Per Larsson-Edefors (ICECS, 2016)

Probabilistic timing analysis on time-randomized platforms for the space domain. - Mikel Fernández; David Morales; Leonidas Kosmidis; Alen Bardizbanyan; Ian Broster; Carles Hernández 001; Eduardo Quiñones; Jaume Abella 001; Francisco J. Cazorla; Paulo Machado; Luca Fossati (DATE, 2017)

Design and Implementation of a Time Predictable Processor: Evaluation With a Space Case Study. - Carles Hernández 001; Jaume Abella 001; Francisco J. Cazorla; Alen Bardizbanyan; Jan Andersson; Fabrice Cros; Franck Wartel (ECRTS, 2017)

EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application. - Enrico Mezzetti; Mikel Fernández; Alen Bardizbanyan; Irune Agirre; Jaume Abella 001; Tullio Vardanega; Francisco J. Cazorla (RTAS, 2017)