High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design. - Petr Matousek; Ales Smrcka; Tomás Vojnar (CHARME, 2005)

Verifying VHDL Designs with Multiple Clocks in SMV. - Ales Smrcka; Vojtech Rehák; Tomás Vojnar; David Safránek; Petr Matousek; Z. Rehák (FMICS/PDMC, 2006)

Verifying Parametrised Hardware Designs Via Counter Automata. - Ales Smrcka; Tomás Vojnar (Haifa Verification Conference, 2007)

Automatic Formal Correspondence Checking of ISA and RTL Microprocessor Description. - Lukás Charvát; Ales Smrcka; Tomás Vojnar (MTV, 2012)

An Abstraction of Multi-port Memories with Arbitrary Addressable Units. - Lukás Charvát; Ales Smrcka; Tomás Vojnar (EUROCAST (1), 2013)

Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. - Lukás Charvát; Ales Smrcka; Tomás Vojnar (MTV, 2014)

Microprocessor Hazard Analysis Via Formal Verification of Parameterized Systems. - Lukás Charvát; Ales Smrcka; Tomás Vojnar (EUROCAST, 2015)

HADES: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. - Lukás Charvát; Ales Smrcka; Tomás Vojnar (MEMICS, 2016)

Verifying Concurrent Programs Using Contracts. - Ricardo J. Dias; Carla Ferreira 001; Jan Fiedor; João M. Lourenço; Ales Smrcka; Diogo G. Sousa; Tomás Vojnar (ICST, 2017)

Advances in the ANaConDA framework for dynamic analysis and testing of concurrent C/C++ programs. - Jan Fiedor; Monika Muzikovská; Ales Smrcka; Ondrej Vasícek; Tomás Vojnar (ISSTA, 2018)

The VALU3S ECSEL Project: Verification and Validation of Automated Systems Safety and Security. - Raul Barbosa; Stylianos Basagiannis; Georgios Giantamidis; H. Becker; Enrico Ferrari; J. Jahic; Alper Kanak; Mikel Labayen Esnaola; Vanessa Orani; David Pereira; Luigi Pomante; Rupert Schlick; et al. (DSD, 2020)

Cross-domain Modelling of Verification and Validation Workflows in the Large Scale European Research Project VALU3S - Invited Paper. - Thomas Bauer 002; Joseba Andoni Agirre; David Fürcho; Wolfgang Herzner; Bob Hruska; Mustafa Karaca; David Pereira; José Proença; Rupert Schlick; Robert Sicher; Ales Smrcka; Ugur Yayan; et al. (SAMOS, 2021)

The VALU3S ECSEL project: Verification and validation of automated systems safety and security. - Joseba Andoni Agirre; Leire Etxeberria; Raul Barbosa; Stylianos Basagiannis; Georgios Giantamidis; Thomas Bauer 002; Enrico Ferrari; Mikel Labayen Esnaola; Vanessa Orani; Johnny Öberg; David Pereira; José Proença; et al. (Microprocess. Microsystems, 2021)

Orchestrating Digital Twins for Distributed Manufacturing Execution Systems. - Tomás Fiedor; Martin Hruska; Ales Smrcka (EUROCAST, 2022)

Integrating OSLC Services into Eclipse. - Jan Fiedor; Bohuslav Krena; Ales Smrcka; Ondrej Vasícek; Tomás Vojnar (EUROCAST, 2022)

Unite: an adapter for transforming analysis tools to web services via OSLC. - Ondrej Vasícek; Jan Fiedor; Tomas Kratochvila; Bohuslav Krena; Ales Smrcka; Tomás Vojnar (ESEC/SIGSOFT FSE, 2022)

Utilizing parametric systems for detection of pipeline hazards. - Lukás Charvát; Ales Smrcka; Tomás Vojnar (Int. J. Softw. Tools Technol. Transf., 2022)

NetLoiter: A Tool for Automated Testing of Network Applications using Fault-injection. - Michal Rozsíval; Ales Smrcka (DSN-W, 2023)

Enhancing Security of AI-Based Code Synthesis with GitHub Copilot via Cheap and Efficient Prompt-Engineering. - Jakub Res; Ivan Homoliak; Martin Peresíni; Ales Smrcka; Kamil Malinka; Petr Hanácek (CoRR, 2024)