VLSI implementation of a pel-by-pel motion estimator. - Vittorio Rampa; Neviano Dal Degan; Alessandro Balboni (ICASSP, 1989)

X-Nets: A visual formalism for system specification and analysis. - Stefano Antoniazzi; Alessandro Balboni; William Fornaciari (Microprocess. Microprogramming, 1993)

A methodology for control-dominated systems codesign. - Stefano Antoniazzi; Alessandro Balboni; William Fornaciari; Donatella Sciuto (CODES, 1994)

From Behavioral Description to Systolic Array Based Architectures. - Alessandro Balboni; Claudio Costi; Franco Fummi; Donatella Sciuto (EDAC-ETC-EUROASIC, 1994)

The role of VHDL within the TOSCA hardware/software codesign framework. - Donatella Sciuto; Stefano Antoniazzi; Alessandro Balboni; William Fornaciari (EURO-DAC, 1994)

HW/SW Codesign for Embedded Telecom Systems. - Stefano Antoniazzi; Alessandro Balboni; William Fornaciari; Donatella Sciuto (ICCD, 1994)

Automatic clock tree generation in ASIC designs. - Alessandro Balboni; Claudio Costi; A. Pellencin; M. Quadrini; Donatella Sciuto (ED&TC, 1995)

Partitioning and Exploration Strategies in the TOSCA Co-Design Flow. - Alessandro Balboni; William Fornaciari; Donatella Sciuto (CODES, 1996)

ASIC Design and FPGA Design: A Unified Design Methodology Applied to Different Technologies. - Alessandro Balboni; Loris Valenti (FPL, 1996)

The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems. - Alessandro Balboni; William Fornaciari; Massimo Vincenzi; Donatella Sciuto (ISSS, 1996)

Co-synthesis and co-simulation of control-dominated embedded systems. - Alessandro Balboni; William Fornaciari; Donatella Sciuto (Des. Autom. Embed. Syst., 1996)

Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach. - Alessandro Balboni; William Fornaciari; Donatella Sciuto (Integr. Comput. Aided Eng., 1998)

Clock skew reduction in ASIC logic design: a methodology for clock tree management. - Alessandro Balboni; Claudio Costi; Massimo Pellencin; Andrea Quadrini; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)