Using Web Services Technology for Inter-enterprise Integration of Digital Time Stamping. - Alessandro Cilardo; Antonino Mazzeo; Luigi Romano; Giacinto Paolo Saggese; Giuseppe Cattaneo (OTM Workshops, 2003)

Carry-Save Montgomery Modular Exponentiation on Reconfigurable Hardware. - Alessandro Cilardo; Antonino Mazzeo; Luigi Romano; Giacinto Paolo Saggese (DATE, 2004)

A Web Services Based Architecture for Digital Time Stamping. - Alessandro Cilardo; Antonino Mazzeo; Luigi Romano; Giacinto Paolo Saggese; Giuseppe Cattaneo (J. Web Eng., 2004)

Exploring the design-space for FPGA-based implementation of RSA. - Alessandro Cilardo; Antonino Mazzeo; Luigi Romano; Giacinto Paolo Saggese (Microprocess. Microsystems, 2004)

A Novel Unified Architecture for Public-Key Cryptography. - Alessandro Cilardo; Antonino Mazzeo; Nicola Mazzocca; Luigi Romano (DATE, 2005)

High-Performance and Interoperable Security Services for Mobile Environments. - Alessandro Cilardo; Luigi Coppolino; Antonino Mazzeo; Luigi Romano (HPCC, 2005)

Reconfigurable systems self-healing using mobile hardware agents. - Alfredo Benso; Alessandro Cilardo; Nicola Mazzocca; Liviu Miclea; Paolo Prinetto; Szilárd Enyedi (ITC, 2005)

An FPGA-based Key-Store for Improving the Dependability of Security Services. - Alessandro Cilardo; Antonino Mazzeo; Luigi Romano (WORDS, 2005)

Elliptic Curve Cryptography Engineering. - Alessandro Cilardo; Luigi Coppolino; Nicola Mazzocca; Luigi Romano (Proc. IEEE, 2006)

Adaptable Parsing of Real-Time Data Streams. - Ferdinando Campanile; Alessandro Cilardo; Luigi Coppolino; Luigi Romano (PDP, 2007)

Combining Programmable Hardware and Web Services Technologies for Delivering High-Performance and Interoperable Security. - Alessandro Cilardo; Luigi Coppolino; Antonino Mazzeo; Luigi Romano (PDP, 2007)

Performance Evaluation of Security Services: An Experimental Approach. - Alessandro Cilardo; Luigi Coppolino; Antonino Mazzeo; Luigi Romano (PDP, 2007)

Design and implementation of a high performance architecture for providing digital time stamping services to mobile devices. - Alessandro Cilardo; Domenico Cotroneo; Cristiano di Flora; Antonino Mazzeo; Luigi Romano; Stefano Russo 001 (Comput. Syst. Sci. Eng., 2007)

Finite field arithmetic for cryptographic applications: theoretical results, algorithms, and architectures. - Alessandro Cilardo (2007)

Virtual Scan Chains for Online Testing of FPGA-based Embedded Systems. - Alessandro Cilardo; Nicola Mazzocca; Luigi Coppolino (DSD, 2008)

Time Efficient Dual-Field Unit for Cryptography-Related Processing. - Alessandro Cilardo; Nicola Mazzocca (VLSI-SoC (Selected Papers), 2008)

A new speculative addition architecture suitable for two's complement operations. - Alessandro Cilardo (DATE, 2009)

Efficient Bit-Parallel GF(2^m) Multiplier for a Large Class of Irreducible Pentanomials. - Alessandro Cilardo (IEEE Trans. Computers, 2009)

Early Prediction of Hardware Complexity in HLL-to-HDL Translation. - Alessandro Cilardo; Paolo Durante; Carmelo Lofiego; Antonino Mazzeo (FPL, 2010)

A CellBE-based HPC Application for the Analysis of Vulnerabilities in Cryptographic Hash Functions. - Alessandro Cilardo; Luigi Esposito; Antonio Veniero; Antonino Mazzeo; Vicenç Beltran 001; Eduard Ayguadé (HPCC, 2010)

The potential of reconfigurable hardware for HPC cryptanalysis of SHA-1. - Alessandro Cilardo (DATE, 2011)

Revisiting Application-Dependent Test for FPGA Devices. - Alessandro Cilardo; Carmelo Lofiego; Antonino Mazzeo; Nicola Mazzocca (ETS, 2011)

Exploring the Potential of Threshold Logic for Cryptography-Related Operations. - Alessandro Cilardo (IEEE Trans. Computers, 2011)

Efficient and scalable OpenMP-based system-level design. - Alessandro Cilardo; Luca Gallo; Antonino Mazzeo; Nicola Mazzocca (DATE, 2013)

Automated synthesis of FPGA-based heterogeneous interconnect topologies. - Alessandro Cilardo; Edoardo Fusella; Luca Gallo; Antonino Mazzeo (FPL, 2013)

Heterogeneous Computing vs. Big Data: The Case of Cryptanalytical Applications. - Alessandro Cilardo (ICA3PP (2), 2013)

TrustedSIM: Towards Unified Mobile Security. - Alessandro Cilardo; Nicola Mazzocca; Luigi Coppolino (UIC/ATC, 2013)

Exploring a New Dimension in Code Mobility for Ubiquitous Embedded Systems. - Alessandro Cilardo; Nicola Mazzocca; Paolo Prinetto (UIC/ATC, 2013)

Design space exploration for high-level synthesis of multi-threaded applications. - Alessandro Cilardo; Luca Gallo; Nicola Mazzocca (J. Syst. Archit., 2013)

Fast Parallel GF(2^m) Polynomial Multiplication for All Degrees. - Alessandro Cilardo (IEEE Trans. Computers, 2013)

Exploiting Vulnerabilities in Cryptographic Hash Functions Based on Reconfigurable Hardware. - Alessandro Cilardo; Nicola Mazzocca (IEEE Trans. Inf. Forensics Secur., 2013)

Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems. - Alessandro Cilardo; Edoardo Fusella; Luca Gallo; Antonino Mazzeo (DATE, 2014)

Generating On-Chip Heterogeneous Systems from High-Level Parallel Code. - Alessandro Cilardo; Luca Gallo (DSD, 2014)

Area implications of memory partitioning for high-level synthesis on FPGAs. - Luca Gallo; Alessandro Cilardo; David B. Thomas; Samuel Bayliss; George A. Constantinides (FPL, 2014)

Automated design space exploration for FPGA-based heterogeneous interconnects. - Alessandro Cilardo; Edoardo Fusella; Luca Gallo; Antonino Mazzeo; Nicola Mazzocca (Des. Autom. Embed. Syst., 2014)

Secure distribution infrastructure for hardware digital contents. - Alessandro Cilardo; Mario Barbareschi; Antonino Mazzeo (IET Comput. Digit. Tech., 2014)

ASP-based optimized mapping in a simulink-to-MPSoC design flow. - Alessandro Cilardo; Dario Socci; Nicola Mazzocca (J. Syst. Archit., 2014)

Improving Multibank Memory Access Parallelism with Lattice-Based Partitioning. - Alessandro Cilardo; Luca Gallo (ACM Trans. Archit. Code Optim., 2014)

High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. - Alessandro Cilardo; Davide De Caro; Nicola Petra; Francesco Caserta; Nicola Mazzocca; Ettore Napoli; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

The HtComp Research Project: An Overview. - Alessandro Cilardo (3PGCIC, 2015)

The MANGO FET-HPC Project: An Overview. - José Flich; Giovanni Agosta; Philipp Ampletzer; David Atienza Alonso; Alessandro Cilardo; William Fornaciari; Mario Kovac; Fabrice Roudet; Davide Zoni (CSE, 2015)

Interplay of loop unrolling and multidimensional memory partitioning in HLS. - Alessandro Cilardo; Luca Gallo (DATE, 2015)

Variable-latency signed addition on FPGAs. - Alessandro Cilardo (FPL, 2015)

Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip. - Edoardo Fusella; Alessandro Cilardo; Antonino Mazzeo (FPL, 2015)

On the Design of a Path-Setup Architecture for Exploiting Hybrid Photonic-Electronic NoCs. - Edoardo Fusella; José Flich; Alessandro Cilardo; Antonino Mazzeo (SiPhotonics@HiPEAC, 2015)

Customizable Heterogeneous Acceleration for Tomorrow's High-Performance Computing. - Alessandro Cilardo; José Flich; Mirko Gagliardi; Rafael Tornero Gavilá (HPCC/CSS/ICESS, 2015)

Crosstalk-Aware Mapping for Tile-Based Optical Network-on-Chip. - Edoardo Fusella; Alessandro Cilardo (HPCC/CSS/ICESS, 2015)

Exploiting Concurrency for the Automated Synthesis of MPSoC Interconnects. - Alessandro Cilardo; Edoardo Fusella; Luca Gallo; Antonino Mazzeo (ACM Trans. Embed. Comput. Syst., 2015)

New Techniques and Tools for Application-Dependent Testing of FPGA-Based Components. - Alessandro Cilardo (IEEE Trans. Ind. Informatics, 2015)

A Configurable Shared Scratchpad Memory for GPU-like Processors. - Alessandro Cilardo; Mirko Gagliardi; Ciro Donnarumma (3PGCIC, 2016)

Partial FPGA bitstream encryption enabling hardware DRM in mobile environments. - Mario Barbareschi; Alessandro Cilardo; Antonino Mazzeo (Conf. Computing Frontiers, 2016)

Securing the cloud with reconfigurable computing: An FPGA accelerator for homomorphic encryption. - Alessandro Cilardo; Domenico Argenziano (DATE, 2016)

Enabling HPC for QoS-sensitive applications: The MANGO approach. - José Flich; Giovanni Agosta; Philipp Ampletzer; David Atienza Alonso; Carlo Brandolese; Alessandro Cilardo; William Fornaciari; Ynse Hoornenborg; Mario Kovac; Bruno Maitre; Giuseppe Massari; Hrvoje Mlinaric; et al. (DATE, 2016)

PhoNoCMap: An application mapping tool for photonic networks-on-chip. - Edoardo Fusella; Alessandro Cilardo (DATE, 2016)

Design automation for application-specific on-chip interconnects: A survey. - Alessandro Cilardo; Edoardo Fusella (Integr., 2016)

Minimizing power loss in optical networks-on-chip through application-specific mapping. - Edoardo Fusella; Alessandro Cilardo (Microprocess. Microsystems, 2016)

Crosstalk-Aware Automated Mapping for Optical Networks-on-Chip. - Edoardo Fusella; Alessandro Cilardo (ACM Trans. Embed. Comput. Syst., 2016)

NoC-Based Thread Synchronization in a Custom Manycore System. - Alessandro Cilardo; Mirko Gagliardi; Daniele Passaretti (3PGCIC, 2017)

MANGO: Exploring Manycore Architectures for Next-GeneratiOn HPC Systems. - José Flich; Giovanni Agosta; Philipp Ampletzer; David Atienza Alonso; Carlo Brandolese; Etienne Cappe; Alessandro Cilardo; Leon Dragic; Alexandre Dray; Alen Duspara; William Fornaciari; Gerald Guillaume; et al. (DSD, 2017)

A Proposal for the Secure Activation and Licensing of FPGA IP Cores. - Domenico Amelino; Mario Barbareschi; Alessandro Cilardo (ITASEC, 2017)

Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration. - José Flich; Alessandro Cilardo; Mario Kovaç; Rafael Tornero; Mirko Gagliardi; Edoardo Fusella; José Maria Martínez; Tomás Picornell (PARCO, 2017)

Energy Analysis of a 4D Variational Data Assimilation Algorithm and Evaluation on ARM-Based HPC Systems. - Rossella Arcucci; Davide Basciano; Alessandro Cilardo; Luisa D'Amore; Filippo Mantovani (PPAM (2), 2017)

Verification of FPGA-augmented trusted computing mechanisms based on Applied Pi Calculus. - Alessandro Cilardo; Andrea Primativo (IACR Cryptol. ePrint Arch., 2017)

Path Setup for Hybrid NoC Architectures Exploiting Flooding and Standby. - Edoardo Fusella; José Flich; Alessandro Cilardo (IEEE Trans. Parallel Distributed Syst., 2017)

H2ONoC: A Hybrid Optical-Electronic NoC Based on Hybrid Topology. - Edoardo Fusella; Alessandro Cilardo (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Understanding turn models for adaptive routing: The modular approach. - Edoardo Fusella; Alessandro Cilardo (DATE, 2018)

Improving Deep Learning with a customizable GPU-like FPGA-based accelerator. - Mirko Gagliardi; Edoardo Fusella; Alessandro Cilardo (PRIME, 2018)

Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems. - William Fornaciari; Giovanni Agosta; David Atienza; Carlo Brandolese; Leila Cammoun; Luca Cremona; Alessandro Cilardo; Albert Farrés; José Flich; Carles Hernández 001; Michal Kulchewski; Simone Libutti; et al. (SAMOS, 2018)

An abstraction layer enabling pervasive hardware-reconfigurable systems. - Alessandro Cilardo; Nicola Mazzocca; Paolo Prinetto (Int. J. Embed. Syst., 2018)

HtComp: bringing reconfigurable hardware to future high-performance applications. - Alessandro Cilardo (Int. J. High Perform. Comput. Netw., 2018)

Reducing Power Consumption of Lasers in Photonic NoCs through Application-Specific Mapping. - Edoardo Fusella; Alessandro Cilardo (ACM J. Emerg. Technol. Comput. Syst., 2018)

Exploring manycore architectures for next-generation HPC systems through the MANGO approach. - José Flich; Giovanni Agosta; Philipp Ampletzer; David Atienza Alonso; Carlo Brandolese; Etienne Cappe; Alessandro Cilardo; Leon Dragic; Alexandre Dray; Alen Duspara; William Fornaciari; Edoardo Fusella; et al. (Microprocess. Microsystems, 2018)

PowerTap: All-digital power meter modeling for run-time power monitoring. - Davide Zoni; Luca Cremona; Alessandro Cilardo; Mirko Gagliardi; William Fornaciari (Microprocess. Microsystems, 2018)

An IP Core Remote Anonymous Activation Protocol. - Domenico Amelino; Mario Barbareschi; Alessandro Cilardo (IEEE Trans. Emerg. Top. Comput., 2018)

Lattice-Based Turn Model for Adaptive Routing. - Edoardo Fusella; Alessandro Cilardo (IEEE Trans. Parallel Distributed Syst., 2018)

A Configurable Implementation of the SHA-256 Hash Function. - Raffaele Martino; Alessandro Cilardo (3PGCIC, 2019)

Lightweight hardware support for selective coherence in heterogeneous manycore accelerators. - Alessandro Cilardo; Mirko Gagliardi; Vincenzo Scotti 002 (DATE, 2019)

Challenges in Deeply Heterogeneous High Performance Systems. - Giovanni Agosta; William Fornaciari; David Atienza; Ramon Canal; Alessandro Cilardo; José Flich; Carles Hernández 001; Michal Kulczewski; Giuseppe Massari; Rafael Tornero Gavilá; Marina Zapater (DSD, 2019)

A Flexible Framework for Exploring, Evaluating, and Comparing SHA-2 Designs. - Raffaele Martino; Alessandro Cilardo (IEEE Access, 2019)

SHA-2 Acceleration Meeting the Needs of Emerging Applications: A Comparative Survey. - Raffaele Martino; Alessandro Cilardo (IEEE Access, 2020)

Hardware support for thread synchronisation in an experimental manycore system. - Alessandro Cilardo; Mirko Gagliardi; Daniele Passaretti (Int. J. Grid Util. Comput., 2020)

Designing a SHA-256 processor for blockchain-based IoT applications. - Raffaele Martino; Alessandro Cilardo (Internet Things, 2020)

The RECIPE approach to challenges in deeply heterogeneous high performance systems. - Giovanni Agosta; William Fornaciari; David Atienza; Ramon Canal; Alessandro Cilardo; José Flich Cardo; Carles Hernández 001; Michal Kulczewski; Giuseppe Massari; Rafael Tornero Gavilá; Marina Zapater (Microprocess. Microsystems, 2020)

The Italian research on HPC key technologies across EuroHPC. - Marco Aldinucci; Giovanni Agosta; Antonio Andreini; Claudio Agostino Ardagna; Andrea Bartolini; Alessandro Cilardo; Biagio Cosenza; Marco Danelutto; Roberto Esposito; William Fornaciari; Roberto Giorgi; Davide Lengani; et al. (CF, 2021)

FPGA-based real-time monitoring support for CAN applications. - Alessandro Cilardo; Stefano Mercogliano (DSD, 2021)

Memory Encryption Support for an FPGA-based RISC-V Implementation. - Alessandro Cilardo (DTIS, 2021)

SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms. - Alessandro Biondi 001; Daniel Casini; Giorgiomaria Cicero; Niccolò Borgioli; Giorgio C. Buttazzo; Gaetano Patti; Luca Leonardi; Lucia Lo Bello; Marco Solieri; Paolo Burgio; Ignacio Sanudo Olmedo; Angelo Ruocco; et al. (IEEE Access, 2021)

Virtualization over Multiprocessor System-on-Chip: an Enabling Paradigm for Industrial IoT. - Alessandro Cilardo; Marcello Cinque; Luigi De Simone; Nicola Mazzocca (CoRR, 2021)

Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives. - Ramon Canal; Carles Hernández 001; Rafael Tornero; Alessandro Cilardo; Giuseppe Massari; Federico Reghenzani; William Fornaciari; Marina Zapater; David Atienza; Ariel Oleksiak; Wojciech Piatek; Jaume Abella 001 (ACM Comput. Surv., 2021)

Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition. - Alessandro Cilardo (Sensors, 2021)

A Pluggable Vector Unit for RISC-V Vector Extension. - Vincenzo Maisto; Alessandro Cilardo (DATE, 2022)

A Proposal for FPGA-Accelerated Deep Learning Ensembles in MPSoC Platforms Applied to Malware Detection. - Alessandro Cilardo; Vincenzo Maisto; Nicola Mazzocca; Franca Rocco di Torrepadula (QUATIC, 2022)

Virtualization Over Multiprocessor Systems-on-Chip: An Enabling Paradigm for the Industrial Internet of Things. - Alessandro Cilardo; Marcello Cinque; Luigi De Simone; Nicola Mazzocca (Computer, 2022)

Lightweight and Predictable Memory Virtualization on Medium-Size Microcontrollers. - Stefano Mercogliano; Daniele Ottaviano; Alessandro Cilardo; Marcello Cinque (DATE, 2024)

Dependable Classical-Quantum Computer Systems Engineering. - Edoardo Giusto; Santiago Núñez-Corrales; Phuong Cao; Alessandro Cilardo; Ravishankar K. Iyer; Weiwen Jiang; Paolo Rech; Flavio Vella; Bartolomeo Montrucchio; Samudra Dasgupta; Travis S. Humble (CoRR, 2024)

An Approach to the Systematic Characterization of Multitask Accelerated CNN Inference in Edge MPSoCs. - Alessandro Cilardo; Vincenzo Maisto; Nicola Mazzocca; Franca Rocco di Torrepadula (ACM Trans. Embed. Comput. Syst., 2024)

AraOS: Analyzing the Impact of Virtual Memory Management on Vector Unit Performance. - Matteo Perotti; Vincenzo Maisto; Moritz Imfeld; Nils Wistoff; Alessandro Cilardo; Luca Benini (CF (Companion), 2025)

Umbra: An Efficient Framework for Trusted Execution on Modern TrustZone-Enabled Microcontrollers. - Stefano Mercogliano; Alessandro Cilardo (DATE, 2025)

A Typology of Quantum-Classical Faults. - Edoardo Giusto; Santiago Núñez-Corrales; Alessandro Cilardo; Nicola Mazzocca; Travis S. Humble (DSN-W, 2025)