Architecture design principles for the integration of synchronization interfaces into Network-on-Chip switches. - Daniele Ludovici; Alessandro Strano; Davide Bertozzi (NoCArc@MICRO, 2009)

Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture. - Daniele Ludovici; Alessandro Strano; Davide Bertozzi; Luca Benini; Georgi Gaydadjiev (NOCS, 2009)

Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs. - Daniele Ludovici; Alessandro Strano; Georgi Nedeltchev Gaydadjiev; Luca Benini; Davide Bertozzi (DATE, 2010)

Process variation and layout mismatch tolerant design of source synchronous links for GALS networks-on-chip. - Alessandro Strano; Carles Hernández 001; Federico Silla; Davide Bertozzi (SoC, 2010)

A library of dual-clock FIFOs for cost-effective and flexible MPSoC design. - Alessandro Strano; Daniele Ludovici; Davide Bertozzi (ICSAMOS, 2010)

Exploiting structural redundancy of SIMD accelerators for their built-in self-testing/diagnosis and reconfiguration. - Alessandro Strano; Davide Bertozzi; Arnaud Grasset; Sami Yehia (ASAP, 2011)

Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture. - Alessandro Strano; Crispín Gómez Requena; Daniele Ludovici; Michele Favalli; María Engracia Gómez; Davide Bertozzi (DATE, 2011)

Mesochronous NoC technology for power-efficient GALS MPSoCs. - Daniele Ludovici; Alessandro Strano; Georgi Nedeltchev Gaydadjiev; Davide Bertozzi (INA-OCMC@HiPEAC, 2011)

Moonrake chip - GALS demonstrator in 40 nm CMOS technology. - Milos Krstic; Xin Fan 003; Eckhard Grass; Christoph Heer; Birgit Sanders; Luca Benini; Mohammad Reza Kakoee; Alessandro Strano; Davide Bertozzi (SoC, 2011)

Contrasting multi-synchronous MPSoC design styles for fine-grained clock domain partitioning: the full-HD video playback case study. - Hervé Tatenguem; Daniele Ludovici; Alessandro Strano; Davide Bertozzi; Helmut Reinig (NoCArc@MICRO, 2011)

Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-on-Chip Design. - Alessandro Strano; Carles Hernández 001; Federico Silla; Davide Bertozzi (Int. J. Embed. Real Time Commun. Syst., 2011)

Power efficiency of switch architecture extensions for fault tolerant NoC design. - Alberto Ghiribaldi; Alessandro Strano; Michele Favalli; Davide Bertozzi (IGCC, 2012)

Quest for the ultimate network-on-chip: the NaNoC project. - Alessandro Strano; Davide Bertozzi; Federico Angiolini; Leonardo Di G. Gregorio; Frank Olaf Sem-Jacobsen; Vladimir Todorov; José Flich; José Silla; Tobias Bjerregaard (INA-OCMC@HiPEAC, 2012)

Optimizing built-in pseudo-random self-testing for network-on-chip switches. - Simone Terenzi; Alessandro Strano; Davide Bertozzi (INA-OCMC@HiPEAC, 2012)

Ultra-low latency NoC testing via pseudo-random test pattern compaction. - Hervé Tatenguem; Alessandro Strano; Vineeth Govind; Jaan Raik; Davide Bertozzi (ISSoC, 2012)

Cooperative Built-in Self-Testing and Self-Diagnosis of NoC Bisynchronous Channels. - Nicola Caselli; Alessandro Strano; Daniele Ludovici; Davide Bertozzi (MCSoC, 2012)

OSR-Lite: Fast and deadlock-free NoC reconfiguration framework. - Alessandro Strano; Davide Bertozzi; Francisco Triviño; José L. Sánchez 002; Francisco J. Alfaro; José Flich (ICSAMOS, 2012)

Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience. - Milos Krstic; Xin Fan 003; Eckhard Grass; Luca Benini; Mohammad Reza Kakoee; Christoph Heer; Birgit Sanders; Alessandro Strano; Davide Bertozzi (Int. J. Embed. Real Time Commun. Syst., 2012)

Optimising pseudo-random built-in self-testing of fully synchronous as well as multisynchronous networks-on-chip. - Alessandro Strano; Nicola Caselli; Simone Terenzi; Davide Bertozzi (IET Comput. Digit. Tech., 2013)

A complete self-testing and self-configuring NoC infrastructure for cost-effective MPSoCs. - Alberto Ghiribaldi; Daniele Ludovici; Francisco Triviño; Alessandro Strano; José Flich; José L. Sánchez 002; Francisco J. Alfaro; Michele Favalli; Davide Bertozzi (ACM Trans. Embed. Comput. Syst., 2013)

An efficient, low-cost routing framework for convex mesh partitions to support virtualization. - Frank Olaf Sem-Jacobsen; Samuel Rodrigo; Tor Skeie; Alessandro Strano; Davide Bertozzi (ACM Trans. Embed. Comput. Syst., 2013)

Enabling power efficiency through dynamic rerouting on-chip. - Frank Olaf Sem-Jacobsen; Samuel Rodrigo; Alessandro Strano; Tor Skeie; Davide Bertozzi; Francisco Gilabert Villamón (ACM Trans. Embed. Comput. Syst., 2013)

Design and Validation of Network-on-Chip Architectures for the Next Generation of Multi-synchronous, Reliable, and Reconfigurable Embedded Systems. - Alessandro Strano (2013)

A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems. - Alessandro Strano; Alberto Ghiribaldi; Hervé Tatenguem Fankem; Davide Bertozzi (INA-OCMC@HiPEAC, 2014)

MIDGARD: A Robot Navigation Simulator for Outdoor Unstructured Environments. - Giuseppe Vecchio; Riccardo Emanuele Sarpietro; Francesco Cancelliere; Simone Palazzo; Dario C. Guastella; Alessandro Strano; Ignacio Carlucho; Giovanni Muscato; Stefano V. Albrecht; Concetto Spampinato (ERF (1), 2024)