A monolithic 2.5-Gb/s clock and data recovery circuit based on Silicon bipolar technology. - Andrea Pallotta; Francesco Centurelli; Francesco Loriga; Alessandro Trifiletti (Broadband European Networks and Multimedia Services, 1998)

A Low-Power Microcontroller with on-Chip Self-Tuning Digital Clock-Generator for Variable-Load Applications. - Mauro Olivieri; Alessandro Trifiletti; Alessandro De Gloria (ICCD, 1999)

A low-power clock and data recovery circuit for 2.5 Gb/s SDH receivers. - Andrea Pallotta; Francesco Centurelli; Alessandro Trifiletti (ISLPED, 2000)

An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores. - Mauro Olivieri; Alessandro Trifiletti (ISCAS (4), 2001)

A tree-like amplifier architecture for large gain-bandwidth product. - Marco Balsi; Francesco Centurelli; Salvatore Pennisi; Alessandro Trifiletti (ICECS, 2002)

Bipolar differential cell with improved bandwidth performance. - Marco Balsi; Francesco Centurelli; Salvatore Pennisi; Alessandro Trifiletti (ICECS, 2002)

A high speed truly IC random number source for smart card microcontrollers. - Marco Bucci; Lucia Germani; Raimondo Luzzi; Pasquale Tommasino; Alessandro Trifiletti; Mario Varanonuovo (ICECS, 2002)

A charge injection based CMOS charge-pump. - Marco Bucci; Raimondo Luzzi; Salvatore Pennisi; Alessandro Trifiletti (ICECS, 2003)

Current output stage with improved CMRR. - Francesco Centurelli; Salvatore Pennisi; Alessandro Trifiletti (ICECS, 2003)

An accurate behavioral model of phase detectors for clock recovery circuits. - Marco Balsi; Francesco Centurelli; Giuseppe Scotti; Pasquale Tommasino; Alessandro Trifiletti (ISCAS (4), 2003)

A High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC. - Marco Bucci; Lucia Germani; Raimondo Luzzi; Alessandro Trifiletti; Mario Varanonuovo (IEEE Trans. Computers, 2003)

Robust three-state PFD architecture with enhanced frequency acquisition capabilities. - Francesco Centurelli; Stefano Costi; Mauro Olivieri; Salvatore Pennisi; Alessandro Trifiletti (ISCAS (4), 2004)

A high-speed low-voltage phase detector for clock recovery from NRZ data. - Francesco Centurelli; Massimo Pozzoni; Giuseppe Scotti; Alessandro Trifiletti (ISCAS (4), 2004)

A Power Consumption Randomization Countermeasure for DPA-Resistant Cryptographic Processors. - Marco Bucci; Michele Guglielmo; Raimondo Luzzi; Alessandro Trifiletti (PATMOS, 2004)

Yield Optimization by Means of Process Parameters Estimation: Comparison Between ABB and ASV Techniques. - Mauro Olivieri; Mirko Scarana; Giuseppe Scotti; Alessandro Trifiletti (PATMOS, 2004)

2-V CMOS current operational amplifier with high CMRR. - Raimondo Luzzi; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2005)

Switched-capacitor body-biasing technique for very low voltage CMOS amplifiers. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2005)

A novel CMOS logic style with data independent power consumption. - Manfred Josef Aigner; Stefan Mangard; Renato Menicocci; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (ISCAS (2), 2005)

10-th order programmable low-pass CMOS integrated pulse-shaping filter. - Marco Balsi; Nicola Carlo Guerrini; Piero Marietti; Giuseppe Scotti; G. Stochino; Alessandro Trifiletti (ISCAS (4), 2005)

A countermeasure against differential power analysis based on random delay insertion. - Marco Bucci; Raimondo Luzzi; Michele Guglielmo; Alessandro Trifiletti (ISCAS (4), 2005)

High-speed CMOS-to-ECL pad driver in 0.18µm CMOS. - Francesco Centurelli; G. Lulli; Piero Marietti; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (ISCAS (1), 2005)

Optimized design of source coupled logic gates in GaAs HEMT technology. - Gaetano Palumbo; Pasquale Tommasino; Alessandro Trifiletti (ISCAS (4), 2005)

CMOS single-to-differential current amplifier. - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS (3), 2005)

Analytic transient solution of SCFL logic gates. - Alberto Maria Bersani; Francesco Centurelli; Luca Fontana; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2005)

Design and Test of a Novel Programmable Clock Generator Semi-Custom Core for Energy-Efficient Systems-on-Chips. - Mauro Olivieri; Simone Smorfa; Alessandro Trifiletti (J. Low Power Electron., 2005)

A 10-Gb/s CMU/CDR chip-set in SiGe BiCMOS commercial technology with multistandard capability. - Francesco Centurelli; Alessandro Golfarelli; Jesus Guinea; Leonardo Masini; Damiana Morigi; Massimo Pozzoni; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control. - Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Three-Phase Dual-Rail Pre-charge Logic. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Alessandro Trifiletti (CHES, 2006)

Side channel analysis resistant design flow. - Manfred Josef Aigner; Stefan Mangard; Francesco Menichelli; Renato Menicocci; Mauro Olivieri; Thomas Popp; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2006)

Validation of a statistical non-linear model of GaAs HEMT MMIC's by hypothesis testing and principal components analysis. - Marco Balsi; Francesco Centurelli; Piero Marietti; Giuseppe Scotti; Pasquale Tommasino; Alessandro Trifiletti; Giancarlo Valente (ISCAS, 2006)

Enhancing power analysis attacks against cryptographic devices. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2006)

A novel concept for stateless random bit generators in cryptographic applications. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Mario Varanonuovo; Alessandro Trifiletti (ISCAS, 2006)

A model for the distortion due to switch on-resistance in sample-and-hold circuits. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ISCAS, 2006)

Inverting closed-loop amplifier architecture with reduced gain error and high input impedance. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2006)

High-CMRR Current Amplifier Architecture and Its CMOS Implementation. - Salvatore Pennisi; Mauro Piccioni; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Power-constrained Bandwidth Optimization in Cascaded Open-loop Amplifiers. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2007)

A Sample-and-Hold Circuit with Very Low Gain Error for Time Interleaving Applications. - Francesco Centurelli; Andrea Simonetti; Alessandro Trifiletti (ECCTD, 2007)

Mismatch Tolerant, Continuous Time, Rail to Rail, Gain Enhanced CMOS Amplifiers. - M. Cianella; Christian Falconi; Arnaldo D'Amico; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2007)

CCII-based high-valued inductance simulators with minumum number of active elements. - Giuseppe Ferri; Nicola Carlo Guerrini; R. Romanato; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2007)

CMOS Miller OTA with Body-Biased Output Stage. - Alfio Dario Grasso; Salvatore Pennisi; Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2007)

Sub-1V CMOS OTA with Body-driven Gain Boosting. - Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti; Salvatore Pennisi (ECCTD, 2007)

Very Low Voltage CMOS Two-stage Amplifier. - Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti; Salvatore Pennisi (ECCTD, 2007)

Analysis of data dependence of leakage current in CMOS cryptographic hardware. - Jacopo Giorgetti; Giuseppe Scotti; Andrea Simonetti; Alessandro Trifiletti (ACM Great Lakes Symposium on VLSI, 2007)

A distortion model for pipeline Analog-to-Digital converters. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ISCAS, 2007)

Mismatch-tolerant, Continuous Time, Gain Enhanced Amplifiers. - Christian Falconi; M. Cianella; Arnaldo D'Amico; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2007)

Low Voltage CMOS Current and Voltage References without Resistors. - Christian Falconi; Arnaldo D'Amico; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2007)

Source-degenerated CMOS Transconductor with Auxiliary Linearization. - Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti; Salvatore Pennisi (ISCAS, 2007)

150 µA CMOS Transconductor with 82 dB SFDR. - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2007)

A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations. - Francesco Centurelli; Luca Giancane; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (PATMOS, 2007)

Testing power-analysis attack susceptibility in register-transfer level designs. - Marco Bucci; Raimondo Luzzi; Francesco Menichelli; Renato Menicocci; Mauro Olivieri; Alessandro Trifiletti (IET Inf. Secur., 2007)

CMOS High-CMRR Current Output Stages. - Francesco Centurelli; Alfio Dario Grasso; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A High-Speed Low-Voltage Phase Detector for Clock Recovery From NRZ Data. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

The Universal Circuit Simulator: A Mixed-Signal Approach to n-Port Network and Impedance Synthesis. - Carmine Gianni; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Linearization Technique for Source-Degenerated CMOS Differential Transconductors. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A Dynamic and Differential CMOS Lookup Table with Data-Independent Power Consumption for Cryptographic Applications on Chip Cards. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Alessandro Trifiletti (IEEE Trans. Dependable Secur. Comput., 2007)

A new dynamic differential logic style as a countermeasure to power analysis attacks. - Luca Giancane; Piero Marietti; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2008)

A gain-enhancing technique for very low-voltage amplifiers. - Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2008)

Dual op amp, LDO regulator with power supply gain suppression for CMOS smart sensors and microsystems. - Christian Falconi; Arnaldo D'Amico; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2008)

Low voltage, low power, compact, high accuracy, high precision PTAT temperature sensor for deep sub-micron CMOS systems. - Christian Falconi; Marco Fratini; Arnaldo D'Amico; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2008)

Mixed-signal flexible architecture for the synthesis of n-port networks. - Carmine Gianni; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2008)

Differential Capacitance Analysis. - Marco Bucci; Raimondo Luzzi; Giuseppe Scotti; Andrea Simonetti; Alessandro Trifiletti (PATMOS, 2008)

A Simple Technique for Fast Digital Background Calibration of A/D Converters. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (EURASIP J. Adv. Signal Process., 2008)

Enhancing power analysis attacks against cryptographic devices. - Marco Bucci; Luca Giancane; Raimondo Luzzi; M. Marino; Giuseppe Scotti; Alessandro Trifiletti (IET Circuits Devices Syst., 2008)

High-Level Side-Channel Attack Modeling and Simulation for Security-Critical Systems on Chips. - Francesco Menichelli; Renato Menicocci; Mauro Olivieri; Alessandro Trifiletti (IEEE Trans. Dependable Secur. Comput., 2008)

Unity-Gain Amplifier With Theoretically Zero Gain Error. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Instrum. Meas., 2008)

Leakage Power Analysis attacks: Theoretical analysis and impact of variations. - Massimo Alioto; Luca Giancane; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2009)

Delay-based dual-rail pre-charge logic. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2009)

CMOS Body-enhanced Cascode Current Mirror. - Carmine Gianni; Giuseppe Scotti; Alessandro Trifiletti; Salvatore Pennisi (ISCAS, 2009)

Power Analysis of a Chaos-based Random Number Generator for Cryptographic Security. - Fabio Pareschi; Giuseppe Scotti; Luca Giancane; Riccardo Rovatti; Gianluca Setti; Alessandro Trifiletti (ISCAS, 2009)

0.9-V CMOS cascode amplifier with body-driven gain boosting. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2009)

A novel low-voltage low-power fully differential voltage and current gained CCII for floating impedance simulations. - Andrea De Marcellis; Giuseppe Ferri; Nicola Carlo Guerrini; Giuseppe Scotti; Vincenzo Stornelli; Alessandro Trifiletti (Microelectron. J., 2009)

Design Solutions for Sample-and-Hold Circuits in CMOS Nanometer Technologies. - Francesco Centurelli; Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell. - Alfio Dario Grasso; Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2009)

On Practical Second-Order Power Analysis Attacks for Block Ciphers. - Renato Menicocci; Andrea Simonetti; Giuseppe Scotti; Alessandro Trifiletti (ICICS, 2010)

Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits. - Massimo Alioto; Luca Giancane; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Behavioral Modeling for Calibration of Pipeline Analog-To-Digital Converters. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A very low-voltage differential amplifier for opamp design. - Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2011)

An MDAC architecture with low sensitivity to finite opamp gain. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2011)

A class-AB flipped voltage follower output stage. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2011)

A class-AB very low voltage amplifier and sample & hold circuit. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2011)

Design strategy for biquad-based continuous-time low-pass filters. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2011)

Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations. - Milena Djukanovic; Luca Giancane; Giuseppe Scotti; Alessandro Trifiletti; Massimo Alioto (ISCAS, 2011)

Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers. - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Reply to "Comments on Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers". - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Delay-Based Dual-Rail Precharge Logic. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Constant and maximum bandwidth feedback amplifier with adaptive frequency compensation. - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2012)

Autotuning technique for CMOS current mode capacitive sensor interfaces. - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2012)

Efficient Digital Background Calibration of Time-Interleaved Pipeline Analog-to-Digital Converters. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A Flip-Flop for the DPA Resistant Three-Phase Dual-Rail Pre-Charge Logic Family. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Effect of components relative tolerance in the magnitude response of a Gm-C biquad. - Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti; Salvatore Pennisi (ECCTD, 2013)

A flip-flop implementation for the DPA-resistant Delay-based Dual-rail Pre-charge Logic family. - Simone Bongiovanni; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (MIXDES, 2013)

A logic level countermeasure against CPA side channel attacks on AES. - Renato Menicocci; Alessandro Trifiletti; Francesco Bruno Trotta (MIXDES, 2013)

Security Evaluation and Optimization of the Delay-based Dual-rail Pre-charge Logic in Presence of Early Evaluation of Data. - Simone Bongiovanni; Giuseppe Scotti; Alessandro Trifiletti (SECRYPT, 2013)

Adaptive frequency compensation for maximum and constant bandwidth feedback amplifiers. - Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2013)

Improved Digital Background Calibration of Time-Interleaved Pipeline A/D Converters. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A Novel Wake-Up Receiver with Addressing Capability for Wireless Sensor Nodes. - Chiara Petrioli; Dora Spenza; Pasquale Tommasino; Alessandro Trifiletti (DCOSS, 2014)

Leakage Power Analysis attacks against a bit slice implementation of the Serpent block cipher. - Massimo Alioto; Simone Bongiovanni; Giuseppe Scotti; Alessandro Trifiletti (MIXDES, 2014)

Design of broad-band power amplifiers by means of an impedance transforming lossy equalizer. - Francesco Centurelli; Giuseppe Scotti; Pasquale Tommasino; Alessandro Trifiletti; Milena Djukanovic (MIXDES, 2014)

Experiments on two clock countermeasures against power analysis attacks. - Renato Menicocci; Alessandro Trifiletti; Francesco Bruno Trotta (MIXDES, 2014)

Implementing radar algorithms on CUDA hardware. - Pietro Monsurrò; Alessandro Trifiletti; Francesco Lannutti (MIXDES, 2014)

Architecture and modeling of a novel optical beamforming network suitable for microwave photonics implementation. - Pietro Monsurrò; Pasquale Tommasino; Alessandro Trifiletti; Gianpietro Locatelli; Antonello Vannucci (MIXDES, 2014)

A wideband amplifier topology based on positive capacitive feedback. - Francesco Centurelli; Roberto Antonio Gualano; Alessandro Trifiletti (Microelectron. J., 2014)

Effectiveness of Leakage Power Analysis Attacks on DPA-Resistant Logic Styles Under Process Variations. - Massimo Alioto; Simone Bongiovanni; Milena Djukanovic; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

88-µ A 1-MHz Stray-Insensitive CMOS Current-Mode Interface IC for Differential Capacitive Sensors. - Giuseppe Scotti; Salvatore Pennisi; Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

High-tuning-range CMOS band-pass IF filter based on a low-Q cascaded biquad optimization technique. - Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2015)

Design and validation through a frequency-based metric of a new countermeasure to protect nanometer ICs from side-channel attacks. - Simone Bongiovanni; Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti (J. Cryptogr. Eng., 2015)

Subsampling Models of Bandwidth Mismatch for Time-Interleaved Converter Calibration. - Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Implementation of the PRESENT-80 block cipher and analysis of its vulnerability to Side Channel Attacks Exploiting Static Power. - Davide Bellizia; Giuseppe Scotti; Alessandro Trifiletti (MIXDES, 2016)

On-chip analog current equalizer as a countermeasure against side-channel attacks in CMOS nanometer technology. - Davide Bellizia; Giuseppe Scotti; Alessandro Trifiletti (MIXDES, 2016)

A new class-AB Flipped Voltage Follower using a common-gate auxiliary amplifier. - Francesco Centurelli; Pietro Monsurrò; Danilo Ruscio; Alessandro Trifiletti (MIXDES, 2016)

Synthesis of anti-aliasing filters for IF receivers. - Pietro Monsurrò; Alessandro Trifiletti (MIXDES, 2016)

A fault-tolerant real-time microcontroller with multiprocessor architecture. - Elio Strollo; Alessandro Trifiletti (MIXDES, 2016)

A shared memory, parameterized and configurable in FPGA, for use in multiprocessor systems. - Elio Strollo; Alessandro Trifiletti (MIXDES, 2016)

CMOS Non-tailed differential pair. - Giuseppe Di Cataldo; Alfio Dario Grasso; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2016)

Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2016)

Multivariate Analysis Exploiting Static Power on Nanoscale CMOS Circuits for Cryptographic Applications. - Milena Djukanovic; Davide Bellizia; Giuseppe Scotti; Alessandro Trifiletti (AFRICACRYPT, 2017)

Power-efficient dynamic-biased CCII. - Gianluca Barile; L. Liberati; Giuseppe Ferri; Leonardo Pantoli; Vincenzo Stornelli; Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2017)

Novel measurements setup for attacks exploiting static power using DC pico-ammeter. - Davide Bellizia; Danilo Cellucci; Valerio Di Stefano; Giuseppe Scotti; Alessandro Trifiletti (ECCTD, 2017)

VHDL implementation of FWL RLS algorithm. - Davide Bellizia; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2017)

A fully-differential class-AB OTA with CMRR improved by local feedback. - Francesco Centurelli; Pietro Monsurrò; Gaetano Parisi; Pasquale Tommasino; Alessandro Trifiletti (ECCTD, 2017)

Class-AB current conveyors based on the FVF. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti; Gianluca Barile; Giuseppe Ferri; Leonardo Pantoli; Vincenzo Stornelli (ECCTD, 2017)

On the use of voltage conveyors for the synthesis of biquad filters and arbitrary networks. - Francesco Centurelli; Pietro Monsurrò; Pasquale Tommasino; Alessandro Trifiletti (ECCTD, 2017)

The recursive batch least squares filter: An efficient RLS filter for floating-point hardware. - Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2017)

Perfect reconstruction filters for 4-channels time-interleaved ADC affected by mismatches. - Felice Rosato; Pietro Monsurrò; Alessandro Trifiletti (ECCTD, 2017)

Multi-rate signal processing based model for high-speed digitizers. - Pietro Monsurrò; Alessandro Trifiletti; Leopoldo Angrisani; Mauro D'Arco (I2MTC, 2017)

Design-oriented models for quick estimation of path delay variability via the fan-out-of-4 metric. - Massimo Alioto; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2017)

Template attacks exploiting static power and application to CMOS lightweight crypto-hardware. - Davide Bellizia; Milena Djukanovic; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2017)

Fully Differential Class-AB OTA with Improved CMRR. - Francesco Centurelli; Pietro Monsurrò; Gaetano Parisi; Pasquale Tommasino; Alessandro Trifiletti (J. Circuits Syst. Comput., 2017)

A Novel Framework to Estimate the Path Delay Variability On the Back of an Envelope via the Fan-Out-of-4 Metric. - Massimo Alioto; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

0.9-V Class-AB Miller OTA in 0.35-µm CMOS With Threshold-Lowered Non-Tailed Differential Pair. - Alfio Dario Grasso; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Faster, Stabler, and Simpler - A Recursive-Least-Squares Algorithm Exploiting the Frisch-Waugh-Lovell Theorem. - Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Calibration of Time-Interleaved ADCs via Hermitianity-Preserving Taylor Approximations. - Pietro Monsurrò; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Univariate Power Analysis Attacks Exploiting Static Dissipation of Nanometer CMOS VLSI Circuits for Cryptographic Applications. - Davide Bellizia; Simone Bongiovanni; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Emerg. Top. Comput., 2017)

Design of Low-Voltage High-Speed CML D-Latches in Nanometer CMOS Technologies. - Giuseppe Scotti; Davide Bellizia; Alessandro Trifiletti; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Novel 0.6V MCML D-Latch Topology exploiting Dynamic Body Bias Threshold Lowering. - Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (ICECS, 2018)

Secure Implementation of TEL-compatible Flip-Flops using a Standard-Cell Approach. - Davide Bellizia; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2018)

A Novel Very Low Voltage Topology to implement MCML XOR Gates. - Davide Bellizia; Gaetano Palumbo; Giuseppe Scotti; Alessandro Trifiletti (PRIME, 2018)

TEL Logic Style as a Countermeasure Against Side-Channel Attacks: Secure Cells Library in 65nm CMOS and Experimental Results. - Davide Bellizia; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Topology of Fully Differential Class-AB Symmetrical OTA With Improved CMRR. - Francesco Centurelli; Pietro Monsurrò; Gaetano Parisi; Pasquale Tommasino; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

New Models for the Calibration of Four-Channel Time-Interleaved ADCs Using Filter Banks. - Pietro Monsurrò; Felice Rosato; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks. - Davide Bellizia; Simone Bongiovanni; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti; Francesco Bruno Trotta (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A low-power class-AB Gm-C biquad stage in CMOS 40nm technology. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ICECS, 2019)

Area-Efficient Low-Power Bandpass Gm-C Filter for Epileptic Seizure Detection in 130nm CMOS. - Riccardo Della Sala; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2019)

High-gain, high-CMRR class AB operational transconductance amplifier based on the flipped voltage follower. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2019)

High-speed AWG exploiting parallel time interleaved DAC cores. - Mauro D'Arco; Leopoldo Angrisani; Pietro Monsurrò; Alessandro Trifiletti (I2MTC, 2020)

0.6-V CMOS cascode OTA with complementary gate-driven gain-boosting and forward body bias. - Danilo Cellucci; Francesco Centurelli; Valerio Di Stefano; Pietro Monsurrò; Salvatore Pennisi; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2020)

Low-power class-AB 4th-order low-pass filter based on current conveyors with dynamic mismatch compensation of biasing errors. - Francesco Centurelli; Pietro Monsurrò; Vincenzo Stornelli; Gianluca Barile; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2020)

An improved reversed miller compensation technique for three-stage CMOS OTAs with double pole-zero cancellation and almost single-pole frequency response. - Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Pasquale Tommasino; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2020)

Delay models and design guidelines for MCML gates with resistor or PMOS load. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (Microelectron. J., 2020)

A Novel 0.5 V MCML D-Flip-Flop Topology Exploiting Forward Body Bias Threshold Lowering. - Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Low-Voltage High-Performance Frequency Divider exploiting Folded MCML. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (ISCAS, 2021)

A Detailed Model of the Switched-Resistor Technique. - Francesco Centurelli; Alessandro Fava; Giuseppe Scotti; Alessandro Trifiletti (IEEE Open J. Circuits Syst., 2021)

Design of Low-Voltage Power Efficient Frequency Dividers in Folded MOS Current Mode Logic. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Compact E-Band I/Q Receiver in SiGe BiCMOS for 5G Backhauling Applications. - Giandomenico Amendola; Luigi Boccia; Francesco Centurelli; Pascal Chevalier 002; Alessandro Fonte; Carmine Mustacchio; Andrea Pallotta; Pasquale Tommasino; Antonio Traversa; Alessandro Trifiletti (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A SiGe HBT 6th-Order 10 GHz Inductor-Less Anti-Aliasing Low-Pass Filter for High-Speed ATI Digitizers. - Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Pasquale Tommasino; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

General Approach to the Calibration of Innovative MFP Multichannel Digitizers. - Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti; Mauro D'Arco; Leopoldo Angrisani (IEEE Trans. Instrum. Meas., 2022)

CMOS Adaptive Biased Second Generation Voltage Conveyor. - Gianluca Barile; Vincenzo Stornelli; Leonardo Pantoli; Davide Colaiuda; Francesco Centurelli; Pasquale Tommasino; Alessandro Trifiletti; Giuseppe Ferri (BATS, 2023)

A 2.5 GHz, 0.6 V Body Driven Dynamic Comparator Exploiting Charge Pump Based Dynamic Biasing. - Cristian Bocciarelli; Francesco Centurelli; Riccardo Della Sala; Valerio Spinogatti; Alessandro Trifiletti (PRIME, 2023)

A Novel Ultra-Low Voltage Fully Synthesizable Comparator exploiting NAND Gates. - Riccardo Della Sala; Cristian Bocciarelli; Francesco Centurelli; Valerio Spinogatti; Alessandro Trifiletti (PRIME, 2023)

Robust Body Biasing Techniques for Dynamic Comparators. - Valerio Spinogatti; Cristian Bocciarelli; Francesco Centurelli; Riccardo Della Sala; Alessandro Trifiletti (PRIME, 2023)

A Novel Parallel Digitizer With a Pulseless Mixing-Filtering-Processing Architecture and Its Implementation in a SiGe HBT Technology at 40GS/s. - Francesco Centurelli; Pietro Monsurrò; Pasquale Tommasino; Alessandro Trifiletti (IEEE Access, 2023)

A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations. - Riccardo Della Sala; Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (IEEE Access, 2023)

An Improved Strong Arm Comparator With Integrated Static Preamplifier. - Valerio Spinogatti; Riccardo Della Sala; Cristian Bocciarelli; Francesco Centurelli; Alessandro Trifiletti (IEEE Access, 2023)

A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages. - Riccardo Della Sala; Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2023)

High-Accuracy Low-Cost Generalized Complex Pruned Volterra Models for Nonlinear Calibration. - Cristian Bocciarelli; Francesco Centurelli; Pietro Monsurrò; Giuseppe Scotti; Valerio Spinogatti; Pasquale Tommasino; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 17 GHz inductorless low-pass filter based on a quasi-Sallen-Key approach. - Cristian Bocciarelli; Francesco Centurelli; Pietro Monsurrò; Valerio Spinogatti; Alessandro Trifiletti (Int. J. Circuit Theory Appl., 2023)

Enhancing Performance of Ultra-Low Voltage Body-Driven Comparators Through Clocked Supply Voltage. - Riccardo Della Sala; Cristian Bocciarelli; Valerio Spinogatti; Francesco Centurelli; Alessandro Trifiletti (PRIME, 2024)

A 150 MS/s, 10 bit SAR ADC Featuring a Modified Quasi-Monotonic Switching Scheme. - Valerio Spinogatti; Cristian Bocciarelli; Lorenzo Eusebio; Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti (PRIME, 2024)

An Intermodulation Radar for Non-Linear Target and Transceiver Detection. - Stefano Pisa; Alessandro Trifiletti; Pasquale Tommasino; Pietro Monsurrò; Piero Tognolatti; Giorgio Leuzzi; Alessandro Di Carlofelice; Emidio Di Giampaolo (Sensors, 2024)

A Novel Ultra-Low-Power, Tunable, LPF and BPF Biquad Based on New Fully Differential Folded-Gain-Boosting. - Matteo Lombardo; Francesco Centurelli; Pietro Monsurrò; Alessandro Trifiletti (ISCAS, 2025)

Exploiting Body-Driven Feedbacks in Physical Unclonable Functions for Ultra Low Voltage, Ultra Low Power Applications: A 0.3 V Weak-PUF. - Riccardo Della Sala; Davide Bellizia; Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)