A reconfigurable VLSI coprocessing system for the block matching algorithm. - Alex R. Bugeja; W. Yang (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A 14-b, 100-MS/s CMOS DAC designed for spectral performance. - Alex R. Bugeja; Bang-Sup Song; Patrick L. Rakers; Steven F. Gillig (IEEE J. Solid State Circuits, 1999)

A self-trimming 14-b 100-MS/s CMOS DAC. - Alex R. Bugeja; Bang-Sup Song (IEEE J. Solid State Circuits, 2000)

High-Speed, High-Precision Digital-Analog Converters Designed for Spectral Performance - Alex R. Bugeja (2000)

Design of a 14 b 100 MS/s switched-capacitor pipelined ADC in RFSiGe BiCMOS. - Alex R. Bugeja; Sung-Ung Kwak (ISCAS (1), 2001)

A dual 10b 200MSPS pipeline D/A converter with DLL-based clock synthesizer. - Gabriele Manganaro; Sung-Ung Kwak; Alex R. Bugeja (CICC, 2003)

A dual 10-b 200-MSPS pipelined D/A converter with DLL-based clock synthesizer. - Gabriele Manganaro; Sung-Ung Kwak; Alex R. Bugeja (IEEE J. Solid State Circuits, 2004)

A highly-integrated CMOS analog baseband transceiver with 180MSPS 13b pipelined CMOS ADC and dual 12b DACs. - Kush Gulati; Mark Peng; Anurag Pulincherry; Carlos E. Muñoz; Mike Lugin; Alex R. Bugeja; Jipeng Li; Anantha P. Chandrakasan (CICC, 2005)

A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs. - Kush Gulati; Mark Peng; Anurag Pulincherry; Carlos E. Muñoz; Mike Lugin; Alex R. Bugeja; Jipeng Li; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2006)