Simulation-free estimation of speed degradation in NMOS self-testing circuits for CAD applications. - Andrzej Krasniewski; Alexander Albicki (DAC, 1985)

Automatic Design of Exhaustively Self-Testing Chips with Bilbo Modules. - Andrzej Krasniewski; Alexander Albicki (ITC, 1985)

Evaluation ot Monitor Complexity for Concurrently Testing Microprogrammed Control Units. - Carl Staelin; Alexander Albicki (ITC, 1985)

Prioritized access in CSMA networks: a node partitioning approach. - Rajiv Arora; Alexander Albicki (LCN, 1988)

An algorithm for voice and data integration on packet-switched local area networks. - Christopher Bucci; Alexander Albicki (ICCD, 1989)

Comments on "Ternary Scan Design for VLSI Testability". - Robert F. Molyneaux; Alexander Albicki (IEEE Trans. Computers, 1989)

Random Testability of Redundant Circuits. - Andrzej Krasniewski; Alexander Albicki (ICCD, 1991)

Self-timed pipeline with adder. - John Compton; Alexander Albicki (Great Lakes Symposium on VLSI, 1992)

An asynchronous multiplier. - Brenda Luderman; Alexander Albicki (Great Lakes Symposium on VLSI, 1992)

Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion. - Xiaodong Xie; Alexander Albicki; Andrzej Krasniewski (ICCD, 1992)

Locally clocked microprocessor. - Stephen J. Muscato; Alexander Albicki (Great Lakes Symposium on VLSI, 1993)

Bit-Splitting for Testability Enhancement in Scan-Based Design. - Xiaodong Xie; Alexander Albicki (ICCD, 1993)

Double Edge Triggered Devices: Speed and Power Considerations. - Razak Hossain; Leszek D. Wronski; Alexander Albicki (ISCAS, 1993)

Reducing Power Dissipation in Serially Connected MOSFET Circuits via Transistor Reordering. - Razak Hossain; Menghui Zheng; Alexander Albicki (ICCD, 1994)

New advances in path delay fault testing of combinational circuits. - Xiaodong Xie; Alexander Albicki (VTS, 1994)

Low power design using double edge triggered flip-flops. - Razak Hossain; Leszek D. Wronski; Alexander Albicki (IEEE Trans. Very Large Scale Integr. Syst., 1994)

High Throughput Error Control Using Parallel CRC. - Andrzej Sobski; Alexander Albicki (VLSI Design, 1994)

Efficient testability enhancement for combinational circuit. - Yu Fang; Alexander Albicki (ICCD, 1995)

Low power and high speed multiplication design through mixed number representations. - Menghui Zheng; Alexander Albicki (ICCD, 1995)

Reducing power dissipation in CMOS circuits by signal probability based transistor reordering. - Razak Hossain; Menghui Zheng; Alexander Albicki (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Extended hyperbolic congruential frequency hop code: generation and bounds for cross- and auto-ambiguity function. - Leszek D. Wronski; Razak Hossain; Alexander Albicki (IEEE Trans. Commun., 1996)