A Comprehensive Study on the Pillar Size of OTS-PCM Memory with an Optimized Process and Scaling Trends Down to Sub-10 nm for SCM Applications. - Wei-Chih Chien; E. K. Lai; L. Buzi; C. W. Cheng; C. W. Yeh; A. Ray; Lynne M. Gignac; N. Gong; Huai-Yu Cheng; Alexander Grun; D. Y. Lee; W. Kim; et al. (IMW, 2023)

A Novel Program-verify Free and Low Drift Multilevel Operation on Cross-point OTS-PCM for In-Memory Computing Application. - Wei-Chih Chien; C. L. Sung; Robert L. Bruce; C. W. Yeh; Huai-Yu Cheng; Z. L. Liu; E. K. Lai; C. W. Cheng; J. X. Zheng; Alexander Grun; A. Ray; D. Daudelin; et al. (IMW, 2024)

AsSeGeS and GeN Heterostructures for Superior OTS Performance. - Alexander Grun; Z. L. Lui; C. W. Cheng; D. Piatek; E. K. Lai; Y. T. Kuo; Wei-Chih Chien; S. Cheng; M. J. BrightSky; H. L. Lung; Huai-Yu Cheng (IMW, 2024)

State-Independent Low Resistance Drift SiSbTe Phase Change Memory for Analog In-Memory Computing Applications. - H. Y. Cheng; Z. L. Liu; A. Majumdar; Alexander Grun; A. Ray; J. Su; Malte J. Rasch; Fabio Carta; Lynne M. Gignac; C. Lavoie; C. W. Cheng; M. Bright Sky; et al. (VLSI Technology and Circuits, 2024)

A Novel Chalcogenide Based CuGeSe Selector Only Memory (SOM) for 3D Xpoint and 3D Vertical Memory Applications. - Wei-Chih Chien; J. X. Zheng; C. W. Yeh; Lynne M. Gignac; H. Y. Cheng; Z. L. Liu; Alexander Grun; C. L. Sung; E. K. Lai; S. Cheng; C. W. Cheng; L. Buzi; et al. (VLSI Technology and Circuits, 2024)

Enhancing 3D XPT/SOM Reliability: Strategies for Mitigating Spike Current and Improving Read Endurance. - C. L. Sung; D. Daudelin; Wei-Chih Chien; R. C. Jordan; S. Cheng; Lynne M. Gignac; Douglas M. Bishop; C. W. Yeh; L. Buzi; C. W. Cheng; J. X. Zheng; E. K. Lai; et al. (IMW, 2025)