Resistive memory device requirements for a neural algorithm accelerator. - Sapan Agarwal; Steven J. Plimpton; David R. Hughart; Alexander H. Hsia; Isaac Richter; Jonathan A. Cox; Conrad D. James; Matthew J. Marinella (IJCNN, 2016)

Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator. - Matthew J. Marinella; Sapan Agarwal; Alexander H. Hsia; Isaac Richter; Robin Jacobs-Gedrim; John Niroula; Steven J. Plimpton; Engin Ipek; Conrad D. James (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

Using Floating Gate Memory to Train Ideal Accuracy Neural Networks. - Sapan Agarwal; Diana Garland; John Niroula; Robin B. Jacobs-Gedrim; Alexander H. Hsia; Michael S. van Heukelom; Elliot J. Fuller; Bruce Draper; Matthew J. Marinella (CoRR, 2019)

Special Session: Exploring the Ultimate Limits of Adiabatic Circuits. - Michael P. Frank; Robert W. Brocato; Thomas M. Conte; Alexander H. Hsia; Anirudh Jain; Nancy A. Missert; Karpur Shukla; Brian D. Tierney (ICCD, 2020)

Reversible Computing with Fast, Fully Static, Fully Adiabatic CMOS. - Michael P. Frank; Robert W. Brocato; Brian D. Tierney; Nancy A. Missert; Alexander H. Hsia (ICRC, 2020)