A Generic Timing Mechanism for Using the APPLES Gate-Level Simulator in a Mixed-Level Simulation Environment. - Alexander Maili; Damian Dalton; Christian Steger (PATMOS, 2004)

Reducing the Communication Bottleneck via On-Chip Cosimulation of Gate-Level HDL and C-Models on a Hardware Accelerator. - Alexander Maili; Christian Steger; Reinhold Weiss; Rob Quigley; Damian Dalton (ISVLSI, 2005)