Characterisation of titanium disilicide thin films. - Alexander Satka; J. Liday; R. Srnánek; A. Vincze; Daniel Donoval; Jaroslav Kovác; Marián Veselý; Miroslav Michalka (Microelectron. J., 2006)

Characterization of MagFET structures. - Martin Daricek; Martin Donoval; Alexander Satka; Tomas Kosik (ICECS, 2008)

Behavior of various geometry MagFET structures. - Martin Daricek; Martin Donoval; Alexander Satka (ECCTD, 2009)

Non-linear thermal modeling of DMOS transistor and validation using electrical measurements and FEM simulations. - Vladimír Kosel; Robert Illing; Michael Glavanovics; Alexander Satka (Microelectron. J., 2010)

Gate leakage current in GaN-based mesa- and planar-type heterostructure field-effect transistors. - Jaroslav Kovác; Alexander Satka; Ales Chvála; D. Donoval; Peter Kordos; Sylvain L. Delage (Microelectron. Reliab., 2012)

Design of In AlN/GaN Heterostructure-Based Logic Cells. - Lukás Nagy; Viera Stopjaková; Alexander Satka (DDECS, 2015)

Analysis of multifinger power HEMTs supported by effective 3-D device electrothermal simulation. - Ales Chvála; Juraj Marek; Patrik Pribytny; Alexander Satka; Steve Stoffels; Niels Posthuma; Stefaan Decoutere; Daniel Donoval (Microelectron. Reliab., 2017)

Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell. - Ales Chvála; Lukás Nagy; Juraj Marek; Juraj Priesol; Daniel Donoval; Alexander Satka; Michal Blaho; Dagmar Gregusová; Ján Kuzmík (DTIS, 2018)

Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates. - Ales Chvála; Lukás Nagy; Juraj Marek; Juraj Priesol; Daniel Donoval; Alexander Satka (DTIS, 2019)

Perimeter Driven Transport in the p-GaN Gate as a Limiting Factor for Gate Reliability. - Steve Stoffels; Niels Posthuma; Stefaan Decoutere; Benoit Bakeroot; Andrea Natale Tallarico; Enrico Sangiorgi; Claudio Fiegna; J. Zheng; X. Ma; Matteo Borga; Elena Fabris; Matteo Meneghini; et al. (IRPS, 2019)

Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs. - Ales Chvála; Lukás Nagy; Juraj Marek; Juraj Priesol; Daniel Donoval; Alexander Satka; Michal Blaho; Dagmar Gregusová; Ján Kuzmík (J. Circuits Syst. Comput., 2019)

FPGA implementation of histogram-based thresholding. - Miroslav Hagara; Peter Kubinec; Alexander Satka; Radovan Stojanovic (MECO, 2022)

Modified algorithm of unimodal thresholding for FPGA implementation. - Miroslav Hagara; Radovan Stojanovic; Alexander Satka; Peter Kubinec; Oldrich Ondrácek (Microprocess. Microsystems, 2022)

Comparison of Otsu's and Rosin's Methods for Threshold Determination. - Miroslav Hagara; Alexander Satka; Oldrich Ondrácek; Radovan Stojanovic (MECO, 2023)

Automatic Detection and Counting of Defects from Cathodoluminescence Maps of GaN Layers. - Juraj Priesol; David Gellen; Alexander Satka (MECO, 2023)

Vibration monitoring using sub-pixel edge localization. - Miroslav Hagara; Alexander Satka; Peter Kubinec; Radovan Stojanovic (MECO, 2024)