Artificial Neural Network Engine: Parallel and Parameterized Architecture Implemented in FPGA. - Milene Barbosa Carvalho; Alexandre Marques Amaral; Luiz Eduardo da Silva Ramos; Carlos Augusto Paiva da Silva Martins; Petr Ekel (PReMI, 2005)

Reconfigurable crossbar switch architecture for network processors. - Henrique C. Freitas; Milene Barbosa Carvalho; Alexandre Marques Amaral; Amanda R. M. Diniz; Carlos Augusto Paiva da Silva Martins; Luiz Eduardo da Silva Ramos (ISCAS, 2006)

Parallel Image Segmentation in Reconfigurable Chip Multiprocessors. - Raphael Fonte Boa; Alexandre Marques Amaral; Dulcinéia Oliveira da Penha; Carlos Augusto Paiva da Silva Martins; Petr Ekel (ISPA Workshops, 2006)

RCMP: A Reconfigurable Chip-Multiprocessor Architecture. - Raphael Fonte Boa; Dulcinéia Oliveira da Penha; Alexandre Marques Amaral; Márcio Oliveira Soares de Souza; Carlos Augusto Paiva da Silva Martins; Petr Yakovlevitch Ekel (ISPA Workshops, 2006)