Symbolic parallelization of loop programs for massively parallel processor arrays. - Jürgen Teich; Alexandru Tanase; Frank Hannig (ASAP, 2013)

Accuracy and performance analysis of Harris Corner computation on tightly-coupled processor arrays. - Éricles Rodrigues Sousa; Alexandru Tanase; Frank Hannig; Jürgen Teich (DASIP, 2013)

A prototype of an adaptive computer vision algorithm on MPSoC architecture. - Éricles Rodrigues Sousa; Alexandru Tanase; Frank Hannig; Jürgen Teich (DASIP, 2013)

High-Level Synthesis Revised - Generation of FPGA Accelerators from a Domain-Specific Language using the Polyhedron Model. - Moritz Schmid; Frank Hannig; Alexandru Tanase; Jürgen Teich (PARCO, 2013)

Exploitation of Quality/Throughput Tradeoffs in Image Processing through Invasive Computing. - Alexandru Tanase; Vahid Lari; Frank Hannig; Jürgen Teich (PARCO, 2013)

Domain-specific augmentations for High-Level Synthesis. - Moritz Schmid; Alexandru Tanase; Frank Hannig; Jürgen Teich; Vivek Singh Bhadouria; Dibyendu Ghoshal (ASAP, 2014)

Symbolic inner loop parallelisation for massively parallel processor arrays. - Alexandru Tanase; Michael Witterauf; Jürgen Teich; Frank Hannig (MEMOCODE, 2014)

Massively Parallel Processor Architectures for Resource-aware Computing. - Vahid Lari; Alexandru Tanase; Frank Hannig; Jürgen Teich (CoRR, 2014)

Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach. - Frank Hannig; Vahid Lari; Srinivas Boppu; Alexandru Tanase; Oliver Reiche (ACM Trans. Embed. Comput. Syst., 2014)

Symbolic Mapping of Loop Programs onto Processor Arrays. - Jürgen Teich; Alexandru Tanase; Frank Hannig (J. Signal Process. Syst., 2014)

A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable Arrays. - Vahid Lari; Alexandru Tanase; Jürgen Teich; Michael Witterauf; Faramarz Khosravi; Frank Hannig; Brett H. Meyer (AHS, 2015)

Adaptive fault tolerance through invasive computing. - Michael Witterauf; Alexandru Tanase; Jürgen Teich; Vahid Lari; Andreas Zwinkau; Gregor Snelting (AHS, 2015)

On-demand fault-tolerant loop processing on massively parallel processor arrays. - Alexandru Tanase; Michael Witterauf; Jürgen Teich; Frank Hannig; Vahid Lari (ASAP, 2015)

Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays. - Alexandru Tanase; Michael Witterauf; Jürgen Teich; Frank Hannig (MEMOCODE, 2015)

Techniques for on-demand structural redundancy for massively parallel processor arrays. - Vahid Lari; Jürgen Teich; Alexandru Tanase; Michael Witterauf; Faramarz Khosravi; Brett H. Meyer (J. Syst. Archit., 2015)

Modulo scheduling of symbolically tiled loops for tightly coupled processor arrays. - Michael Witterauf; Alexandru Tanase; Frank Hannig; Jürgen Teich (ASAP, 2016)

Providing fault tolerance through invasive computing. - Vahid Lari; Andreas Weichslgartner; Alexandru Tanase; Michael Witterauf; Faramarz Khosravi; Jürgen Teich; Jan Heißwolf; Stephanie Friederich; Jürgen Becker 001 (it Inf. Technol., 2016)

Efficiency in ILP processing by using orthogonality. - Marcel Brand; Frank Hannig; Alexandru Tanase; Jürgen Teich (ASAP, 2017)

Orthogonal Instruction Processing: An Alternative to Lightweight VLIW Processors. - Marcel Brand; Frank Hannig; Alexandru Tanase; Jürgen Teich (MCSoC, 2017)

TCPA editor: A design automation environment for a class of coarse-grained reconfigurable arrays. - Éricles Sousa; Arindam Chakraborty; Alexandru Tanase; Frank Hannig; Jürgen Teich (ReConFig, 2017)

A reconfigurable memory architecture for system integration of coarse-grained reconfigurable arrays. - Éricles Sousa; Alexandru Tanase; Frank Hannig; Jürgen Teich (ReConFig, 2017)

A Novel Image Impulse Noise Removal Algorithm Optimized for Hardware Accelerators. - Vivek Singh Bhadouria; Alexandru Tanase; Moritz Schmid; Frank Hannig; Jürgen Teich; Dibyendu Ghoshal (J. Signal Process. Syst., 2017)

Symbolic parallelization of nested loop programs = Symbolische Parallelisierung verschachtelter Schleifenprogramme. - Alexandru Tanase (2017)

Symbolic Parallelization of Nested Loop Programs - Alexandru-Petru Tanase; Frank Hannig; Jürgen Teich (Springer, 2018)

Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study. - Éricles Sousa; Michael Witterauf; Marcel Brand; Alexandru Tanase; Frank Hannig; Jürgen Teich (ASAP, 2018)

Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays. - Alexandru Tanase; Michael Witterauf; Jürgen Teich; Frank Hannig (ACM Trans. Embed. Comput. Syst., 2018)

*-Predictable MPSoC execution of real-time control applications using invasive computing. - Marcel Brand; Michael Witterauf; Éricles Sousa; Alexandru Tanase; Frank Hannig; Jürgen Teich (Concurr. Comput. Pract. Exp., 2021)