Design Issues of LC Tuned Oscillators for Integrated Transceivers. - Carlo Samori; Andrea L. Lacaita; Alfio Zanchi; P. Vita (Great Lakes Symposium on VLSI, 1998)

Fast simulation techniques for phase noise analysis of oscillators. - Salvatore Levantino; Alfio Zanchi; Andrea Bonfanti; Carlo Samori (ISCAS, 2000)

Phase noise degradation at high oscillation amplitudes in LC-tuned VCO's. - Carlo Samori; Andrea L. Lacaita; Alfio Zanchi; Salvatore Levantino; Giovanni Calí (IEEE J. Solid State Circuits, 2000)

Automatic amplitude control loop for a 2-V, 2.5-GHz LC-tank VCO. - Alfio Zanchi; Andrea Bonfanti; Salvatore Levantino; Carlo Samori; Andrea L. Lacaita (CICC, 2001)

A 2-V 2.5-GHz-104-dBc/Hz at 100 kHz fully integrated VCO with wide-band low-noise automatic amplitude control loop. - Alfio Zanchi; Carlo Samori; Salvatore Levantino; Andrea L. Lacaita (IEEE J. Solid State Circuits, 2001)

Measurement and SPICE prediction of sub-picosecond clock jitter in A/D converters. - Alfio Zanchi; Ioannis Papantonopoulos; Frank (Ching-Yuh) Tsay (ISCAS (5), 2003)

Impact of capacitor dielectric relaxation on a 14-bit 70-MS/s pipeline ADC in 3-V BiCMOS. - Alfio Zanchi; Frank (Ching-Yuh) Tsay; Ioannis Papantonopoulos (IEEE J. Solid State Circuits, 2003)

A 16-bit 65-MS/s 3.3-V pipeline ADC core in SiGe BiCMOS with 78-dB SNR and 180-fs jitter. - Alfio Zanchi; Frank (Ching-Yuh) Tsay (IEEE J. Solid State Circuits, 2005)

A 16-bit 65-MS/s Pipeline ADC With 80-dBFS SNR Using Analog Auto-Calibration in SiGe SOI Complementary BiCMOS. - Alfio Zanchi; Dong-Young Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Analysis and Characterization of the Effects of Clock Jitter in A/D Converters for Subsampling. - Alfio Zanchi; Carlo Samori (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A diode-less compact voltage/frequency reference-in-one. - Alfio Zanchi (CICC, 2018)