Analysis of error detection schemes: Toolchain support and hardware/software implications. - Ali Azarian; João Canas Ferreira; Stephan Werner 002; Zlatko Petrov; João M. P. Cardoso; Michael Hübner 001 (AHS, 2012)

Pipelining computing stages in configurable multicore architectures. - Ali Azarian (FPL, 2013)

An FPGA-based multi-core approach for pipelining computing stages. - Ali Azarian; João M. P. Cardoso; Stephan Werner 002; Jürgen Becker 001 (SAC, 2013)

Coarse/Fine-grained Approaches for Pipelining Computing Stages in FPGA-Based Multicore Architectures. - Ali Azarian; João M. P. Cardoso (Euro-Par Workshops (2), 2014)

Reducing misses to external memory accesses in task-level pipelining. - Ali Azarian; João M. P. Cardoso (ISCAS, 2015)

Pipelining data-dependent tasks in FPGA-based multicore architectures. - Ali Azarian; João M. P. Cardoso (Microprocess. Microsystems, 2016)

Task-Level Pipelining in Configurable Multicore Architectures - Ali Azarian (2016)