Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. - Shahnam Mirzaei; Ali Irturk; Ryan Kastner; Brad T. Weals; Richard E. Cagley (ASAP, 2008)

Automatic generation of decomposition based matrix inversion architectures. - Ali Irturk; Bridget Benson; Arash Arfaee; Ryan Kastner (FPT, 2008)

Survey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks. - Bridget Benson; Ali Irturk; Junguk Cho; Ryan Kastner (Underwater Networks, 2008)

An FPGA Design Space Exploration Tool for Matrix Inversion Architectures. - Ali Irturk; Bridget Benson; Shahnam Mirzaei; Ryan Kastner (SASP, 2008)

Xquasher: a tool for efficient computation of multiple linear expressions. - Arash Arfaee; Ali Irturk; Nikolay Laptev; Farzan Fallah; Ryan Kastner (DAC, 2009)

Energy benefits of reconfigurable hardware for use in underwater sensor nets. - Bridget Benson; Ali Irturk; Junguk Cho; Ryan Kastner (IPDPS, 2009)

Architectural optimization of decomposition algorithms for wireless communication systems. - Ali Irturk; Bridget Benson; Nikolay Laptev; Ryan Kastner (WCNC, 2009)

GUSTO : general architecture design utility and synthesis tool for optimization. - Ali Irturk (2009)

Theoretical analysis of gate level information flow tracking. - Jason Oberg; Wei Hu 008; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Ryan Kastner (DAC, 2010)

GUSTO: An automatic generation and optimization tool for matrix inversion architectures. - Ali Irturk; Bridget Benson; Shahnam Mirzaei; Ryan Kastner (ACM Trans. Embed. Comput. Syst., 2010)

Information flow isolation in I2C and USB. - Jason Oberg; Wei Hu 008; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Ryan Kastner (DAC, 2011)

Design and Implementation of an FPGA-Based Real-Time Face Recognition System. - Janarbek Matai; Ali Irturk; Ryan Kastner (FCCM, 2011)

Theoretical Fundamentals of Gate Level Information Flow Tracking. - Wei Hu 008; Jason Oberg; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Dejun Mu; Ryan Kastner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures. - Ali Irturk; Janarbek Matai; Jason Oberg; Jeffrey Su; Ryan Kastner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

GPU acceleration of optical mapping algorithm for cardiac electrophysiology. - Pingfan Meng; Ali Irturk; Ryan Kastner; Andrew D. McCulloch; Jeffrey H. Omens; Adam Wright (EMBC, 2012)

On the Complexity of Generating Gate Level Information Flow Tracking Logic. - Wei Hu 008; Jason Oberg; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Dejun Mu; Ryan Kastner (IEEE Trans. Inf. Forensics Secur., 2012)

A FPGA design for high speed feature extraction from a compressed measurement stream. - Dustin Richmond; Ryan Kastner; Ali Irturk; John McGarry (FPL, 2013)