Generation of Feasible Test Sequences for EFSM Models. - Ali Y. Duale; M. Ümit Uyar (TestCom, 2000)

Test Generation in the Presence of Conflicting Timers. - Mariusz A. Fecko; Paul D. Amer; M. Ümit Uyar; Ali Y. Duale (TestCom, 2000)

Towards Testing SDL Specifications: Models and Fault Coverage for Concurrent Timers. - Mariusz A. Fecko; M. Ümit Uyar; Ali Y. Duale (FORTE, 2003)

Experience in developing and testing network protocol software using FDTs. - M. Ümit Uyar; Mariusz A. Fecko; Ali Y. Duale; Paul D. Amer; Adarshpal S. Sethi (Inf. Softw. Technol., 2003)

A technique to generate feasible tests for communications systems with multiple timers. - Mariusz A. Fecko; M. Ümit Uyar; Ali Y. Duale; Paul D. Amer (IEEE/ACM Trans. Netw., 2003)

Architectural Verification of Large Multiprocessor Computers. - Ali Y. Duale; Theodore J. Bohizic; Dennis W. Wittig (PDPTA, 2004)

A Method Enabling Feasible Conformance Test Sequence Generation for EFSM Models. - Ali Y. Duale; M. Ümit Uyar (IEEE Trans. Computers, 2004)

Pseudo-Random System Testing: Coverage Estimation and Enhancement. - Ali Y. Duale; Theodore J. Bohizic; Dennis W. Wittig (Software Engineering Research and Practice, 2005)

Decimal floating-point in z9: An implementation and testing perspective. - Ali Y. Duale; Mark H. Decker; Hans-Georg Zipperer; Merav Aharoni; Theodore J. Bohizic (IBM J. Res. Dev., 2007)