High-Speed Signal Propagation on Lossy Transmission Lines. - Alina Deutsch; Gerard V. Kopcsay; Vincent A. Ranieri; J. K. Cataldo; Eileen A. Galligan; William S. Graham; R. P. McGouey; Sharon L. Nunes; Jurij R. Paraszczak; John J. Ritsko; R. J. Serino; D. Y. Shih; et al. (IBM J. Res. Dev., 1990)

Electrical characterization and performance limits of a flexible cable. - Alina Deutsch; David W. Dranchak; G. Arjavalingam; Christopher W. Surovic; James K. Tam; Gerard V. Kopcsay; John B. Gillett (IBM J. Res. Dev., 1993)

Performance limits of electrical cables for intrasystem communication. - Alina Deutsch; G. Arjavalingam; Christopher W. Surovic; Alphonso P. Lanzetta; Keith E. Fogel; Fuad Dowany; Mark B. Ritter (IBM J. Res. Dev., 1994)

Modeling and characterization of long on-chip interconnections for high-performance microprocessors. - Alina Deutsch; Gerard V. Kopcsay; Christopher W. Surovic; Barry J. Rubin; Lewis M. Terman; Richard P. Dunne Jr.; Thomas A. Gallo; Robert H. Dennard (IBM J. Res. Dev., 1995)

Single-chip 4×500-MBd CMOS transceiver. - Albert X. Widmer; Kevin R. Wrenner; Herschel A. Ainspan; Ben Parker; Pierre Austruy; Bernard Brezzo; Anne-Marie Haen; John F. Ewen; Mehmet Soyuer; Alain Blanc; Jean-Claude Abbiate; Alina Deutsch; et al. (IEEE J. Solid State Circuits, 1996)

Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor. - Phillip J. Restle; Keith A. Jenkins; Alina Deutsch; Peter W. Cook (IEEE J. Solid State Circuits, 1998)

Electrical characteristics of interconnections for high-performance systems. - Alina Deutsch (Proc. IEEE, 1998)

On-chip wiring design challenges for gigahertz operation. - Alina Deutsch; Paul W. Coteus; Gerard V. Kopcsay; Howard H. Smith; Christopher W. Surovic; Byron Krauter; Daniel C. Edelstein; Phillip J. Restle (Proc. IEEE, 2001)

Blue Gene/L, a System-On-A-Chip. - George S. Almási; Daniel K. Beece; Ralph Bellofatto; Gyan Bhanot; Randy Bickford; Matthias A. Blumrich; Arthur A. Bright; José R. Brunheroto; Calin Cascaval; José G. Castaños; Luis Ceze; Paul Coteus; et al. (CLUSTER, 2002)

An overview of the BlueGene/L Supercomputer. - Narasimha R. Adiga; George Almási 001; George S. Almási; Yariv Aridor; Rajkishore Barik; Daniel K. Beece; Ralph Bellofatto; Gyan Bhanot; Randy Bickford; Matthias A. Blumrich; Arthur A. Bright; José R. Brunheroto; et al. (SC, 2002)

A comprehensive 2-D inductance modeling approach for VLSI interconnects: frequency-dependent extraction and compact circuit model synthesis. - Gerard V. Kopcsay; Byron Krauter; David Widiger; Alina Deutsch; Barry J. Rubin; Howard H. Smith (IEEE Trans. Very Large Scale Integr. Syst., 2002)

A CAD Methodology and Tool for the Characterization of Wide On-Chip Buses. - Ibrahim M. Elfadel; Alina Deutsch; Gerard V. Kopcsay; Bradley Rubin; Howard H. Smith (DATE, 2004)

Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection. - John U. Knickerbocker; Paul S. Andry; L. Paivikki Buchwalter; Alina Deutsch; Raymond R. Horton; Keith A. Jenkins; Young Hoon Kwark; Gerald McVicker; Chirag S. Patel; Robert J. Polastre; Christian D. Schuster; Arun Sharma; et al. (IBM J. Res. Dev., 2005)

Low power passive equalizer optimization using tritonic step response. - Ling Zhang; Wenjian Yu; Haikun Zhu; Alina Deutsch; George A. Katopis; Daniel M. Dreps; Ernest S. Kuh; Chung-Kuan Cheng (DAC, 2008)

Low Power Passive Equalizer Design for Computer Memory Links. - Ling Zhang; Wenjian Yu; Yulei Zhang 002; Renshen Wang; Alina Deutsch; George A. Katopis; Daniel M. Dreps; James F. Buckwalter; Ernest S. Kuh; Chung-Kuan Cheng (Hot Interconnects, 2008)

Electrical-thermal co-analysis for power delivery networks in 3D system integration. - Jianyong Xie; Daehyun Chung; Madhavan Swaminathan; Michael McAllister; Alina Deutsch; Lijun Jiang; Barry J. Rubin (3DIC, 2009)

Fast 3-D thermal analysis of complex interconnect structures using electrical modeling and simulation methodologies. - Chuan Xu; Lijun Jiang; Seshadri K. Kolluri; Barry J. Rubin; Alina Deutsch; Howard H. Smith; Kaustav Banerjee (ICCAD, 2009)

Design methodology of high performance on-chip global interconnect using terminated transmission-line. - Yulei Zhang 002; Ling Zhang; Alina Deutsch; George A. Katopis; Daniel M. Dreps; James F. Buckwalter; Ernest S. Kuh; Chung-Kuan Cheng (ISQED, 2009)

Prediction of high-performance on-chip global interconnection. - Yulei Zhang 002; Xiang Hu; Alina Deutsch; A. Ege Engin; James F. Buckwalter; Chung-Kuan Cheng (SLIP, 2009)

Prediction and Comparison of High-Performance On-Chip Global Interconnection. - Yulei Zhang 002; Xiang Hu; Alina Deutsch; A. Ege Engin; James F. Buckwalter; Chung-Kuan Cheng (IEEE Trans. Very Large Scale Integr. Syst., 2011)