Aline Vieira de Mello

According to our database, Aline Vieira de Mello authored at least 16 papers between 2002 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Graduates' Perceptions of a Software Engineering Undergraduate Program: a view from postgraduation and industry.

Aline Vieira de Mello, Andréa Sabedra Bordin, Alice Fonseca Finger

Proceedings of the 19th Brazilian Symposium on Software Quality, 2020

2018

The State of Practice in Requirements Engineering in the Development of Mobile Applications.

Wolleson Kevin Kelm, Aline Vieira de Mello, Maicon Bernardino

Proceedings of the 17th Brazilian Symposium on Software Quality, 2018

2010

Parallel simulation of systemC TLM 2.0 compliant MPSoC on SMP workstations.

Aline Mello, Isaac Maia, Alain Greiner, François Pêcheux

Proceedings of the Design, Automation and Test in Europe, 2010

2009

A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs.

Nicolas Pouillon, Alexandre Bécoulet, Aline Vieira de Mello, François Pêcheux, Alain Greiner

Proceedings of the Twentienth IEEE/IFIP International Symposium on Rapid System Prototyping, 2009

2007

QoS in Networks-on-Chip - Beyond Priority and Circuit Switching Techniques.

Aline Mello, Ney Calazans, Fernando Moraes

Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007

Rate-based scheduling policy for QoS flows in networks on chip.

Aline Mello, Ney Laert Vilar Calazans

Proceedings of the IFIP VLSI-SoC 2007, 2007

Communication Models in Networks-on-Chip.

Everton Carara, Aline Mello, Fernando Moraes

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

2006

Application driven traffic modeling for NoCs.

Leonel Tedesco, Aline Mello, Leonardo Giacomet, Ney Calazans, Fernando Gehm Moraes

Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

Evaluation of current QoS Mechanisms in Networks on Chip.

Aline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes

Proceedings of the International Symposium on System-on-Chip, 2006

2005

Traffic generation and performance evaluation for mesh-based NoCs.

Leonel Tedesco, Aline Mello, Diego Garibotti, Ney Calazans, Fernando Moraes

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

Virtual channels in networks on chip: implementation and evaluation on hermes NoC.

Aline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

MAIA: a framework for networks on chip generation and verification.

Luciano Ost, Aline Mello, José Palma, Fernando Gehm Moraes, Ney Calazans

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

HERMES: an infrastructure for low area overhead packet-switching networks on chip.

Fernando Gehm Moraes, Ney Calazans, Aline Mello, Leandro Möller, Luciano Ost

Integr., 2004

MultiNoC: A Multiprocessing System Enabled by a Network on Chip.

Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes

Proceedings of the 2004 Design, 2004

2003

A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping.

Fernando Gehm Moraes, Aline Mello, Leandro Möller, Luciano Ost, Ney Laert Vilar Calazans

Proceedings of the IFIP VLSI-SoC 2003, 2003

2002

Core Communication Interface for FPGAs.

José Carlos S. Palma, Aline Vieira de Mello, Leandro Möller, Fernando Moraes, Ney Calazans

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002