On Scheduling in Multiprocessor Systems Using Fuzzy Logic. - Alireza Kaviani; Zvonko G. Vranesic (ISMVL, 1994)

Hybrid FPGA Architecture. - Alireza Kaviani; Stephen Brown 003 (FPGA, 1996)

Computational field programmable architecture. - Alireza Kaviani; Daniel Vranesic; Stephen Brown 003 (CICC, 1998)

The Hybrid Field-Programmable Architecture. - Alireza Kaviani; Stephen Brown 003 (IEEE Des. Test Comput., 1999)

Technology mapping issues for an FPGA with lookup tables and PLA-like blocks. - Alireza Kaviani; Stephen Brown 003 (FPGA, 2000)

Dynamic power consumption in Virtex[tm]-II FPGA family. - Li Shang; Alireza Kaviani; Kusuma Bathala (FPGA, 2002)

Using Design Hierarchy to Improve Quality of Results in FPGAs. - Alireza Kaviani (FPL, 2002)

Phase Alignment Using Asynchronous State Machines. - Alireza Kaviani (ASYNC, 2004)

Programmable all-digital adaptive deskewing and phase shifting. - Alireza Kaviani; Tao Pi; Declan Kelly (SoCC, 2008)

Analyzing the divide between FPGA academic and commercial results. - Elias Vansteenkiste; Alireza Kaviani; Henri Fraisse (FPT, 2015)

Improving FPGA NoC performance using virtual cut-through switching technique. - Pongstorn Maidee; Alireza Kaviani (ReConFig, 2015)

Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network. - Henri Fraisse; Abhishek Joshi; Dinesh Gaitonde; Alireza Kaviani (FPGA, 2016)

LinkBlaze: Efficient global data movement for FPGAs. - Pongstorn Maidee; Alireza Kaviani; Kevin Zeng (ReConFig, 2017)

RapidWright: Enabling Custom Crafted Implementations for FPGAs. - Chris Lavin; Alireza Kaviani (FCCM, 2018)

Build Your Own Domain-specific Solutions with RapidWright: Invited Tutorial. - Chris Lavin; Alireza Kaviani (FPGA, 2019)

An Open-Source Lightweight Timing Model for RapidWright. - Pongstorn Maidee; Chris Neely; Alireza Kaviani; Chris Lavin (FPT, 2019)

Software-like Compilation for Data Center FPGA Accelerators. - James Thomas 003; Chris Lavin; Alireza Kaviani (HEART, 2021)

RWRoute: An Open-source Timing-driven Router for Commercial FPGAs. - Yun Zhou; Pongstorn Maidee; Chris Lavin; Alireza Kaviani; Dirk Stroobandt (Zenodo, 2021)

RapidStream: Parallel Physical Implementation of FPGA HLS Designs. - Licheng Guo; Pongstorn Maidee; Yun Zhou; Chris Lavin; Jie Wang 022; Yuze Chi; Weikang Qiao; Alireza Kaviani; Zhiru Zhang; Jason Cong (FPGA, 2022)

RWRoute: An Open-source Timing-driven Router for Commercial FPGAs. - Yun Zhou; Pongstorn Maidee; Chris Lavin; Alireza Kaviani; Dirk Stroobandt (ACM Trans. Reconfigurable Technol. Syst., 2022)

Addressing the EDA Roadblocks for Domain-specific Compilers: An Industry Perspective. - Alireza Kaviani (ISPD, 2023)

RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration. - Licheng Guo; Pongstorn Maidee; Yun Zhou; Chris Lavin; Eddie Hung; Wuxi Li; Jason Lau; Weikang Qiao; Yuze Chi; Linghao Song; Yuanlong Xiao; Alireza Kaviani; et al. (ACM Trans. Reconfigurable Technol. Syst., 2023)

Almost Envy-free Allocation of Indivisible Goods: A Tale of Two Valuations. - Alireza Kaviani; Masoud Seddighin; AmirMohammad Shahrezaei (CoRR, 2024)

Improved Approximate EFX Guarantees for Multigraphs. - Alireza Kaviani; Alireza Keshavarz; Masoud Seddighin; AmirMohammad Shahrezaei (CoRR, 2025)