Measuring routing congestion for multi-layer global routing. - Tom W. Chen; Alkan Cengiz (ACM Great Lakes Symposium on VLSI, 2000)

Routing-Tree Construction with Concurrent Performance, Power and Congestion Optimization. - Alkan Cengiz; Tom W. Chen (ISVLSI, 2006)

A Progressive Two-Stage Global Routing for Macro-Cell Based Designs. - Alkan Cengiz; Tom W. Chen (VLSI Design, 2006)

Improving SER Immunity of Combinational Logic Using Combinations of Spatial and Temporal Checking. - Tsau-Shuan Wu; Alkan Cengiz; Tom W. Chen (DSD, 2008)

Rapid design space exploration using legacy design data and technology scaling trend. - Charles Thangaraj; Alkan Cengiz; Tom Chen 001 (Integr., 2010)