Dynamic power minimization during combinational circuit testing as a traveling salesman problem. - Artem Sokolov; Alodeep Sanyal; L. Darrell Whitley; Yashwant K. Malaiya (Congress on Evolutionary Computation, 2005)

A Pattern Generation Technique for Maximizing Power Supply Currents. - Kunal P. Ganeshpure; Alodeep Sanyal; Sandip Kundu (ICCD, 2006)

Accelerating Soft Error Rate Testing Through Pattern Selection. - Alodeep Sanyal; Kunal P. Ganeshpure; Sandip Kundu (IOLTS, 2007)

On Derating Soft Error Probability Based on Strength Filtering. - Alodeep Sanyal; Sandip Kundu (IOLTS, 2007)

On Accelerating Soft-Error Detection by Targeted Pattern Generation. - Alodeep Sanyal; Kunal P. Ganeshpure; Sandip Kundu (ISQED, 2007)

An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect. - Ashesh Rastogi; Wei Chen; Alodeep Sanyal; Sandip Kundu (VLSI Design, 2007)

On Modeling and Testing of Lithography Related Open Faults in Nano-CMOS Circuits. - Aswin Sreedhar; Alodeep Sanyal; Sandip Kundu (DATE, 2008)

A Built-In Self-Test Scheme for Soft Error Rate Characterization. - Alodeep Sanyal; Syed M. Alam; Sandip Kundu (IOLTS, 2008)

A Built-in Test and Characterization Method for Circuit Marginality Related Failures. - Alodeep Sanyal; Sandip Kundu (ISQED, 2008)

On Composite Leakage Current Maximization. - Ashesh Rastogi; Kunal P. Ganeshpure; Alodeep Sanyal; Sandip Kundu (J. Electron. Test., 2008)

A study on impact of aggressor de-rating in the context of multiple crosstalk effects in circuits. - Alodeep Sanyal; Abhisek Pan; Sandip Kundu (ACM Great Lakes Symposium on VLSI, 2009)

A study on impact of loading effect on capacitive crosstalk noise. - Alodeep Sanyal; Abhisek Pan; Sandip Kundu (ISQED, 2009)

An Improved Soft-Error Rate Measurement Technique. - Alodeep Sanyal; Kunal P. Ganeshpure; Sandip Kundu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

RT-level design-for-testability and expansion of functional test sequences for enhanced defect coverage. - Alodeep Sanyal; Krishnendu Chakrabarty; Mahmut Yilmaz; Hideo Fujiwara (ITC, 2010)

BIST to Detect and Characterize Transient and Parametric Failures. - Alodeep Sanyal; Syed M. Alam; Sandip Kundu (IEEE Des. Test Comput., 2010)

An Efficient Technique for Leakage Current Estimation in Nanoscaled CMOS Circuits Incorporating Self-Loading Effects. - Alodeep Sanyal; Ashesh Rastogi; Wei Chen; Sandip Kundu (IEEE Trans. Computers, 2010)

A Pattern Generation Technique for Maximizing Switching Supply Currents Considering Gate Delays. - Kunal P. Ganeshpure; Alodeep Sanyal; Sandip Kundu (IEEE Trans. Computers, 2012)

Test Pattern Generation for Multiple Aggressor Crosstalk Effects Considering Gate Leakage Loading in Presence of Gate Delays. - Alodeep Sanyal; Kunal P. Ganeshpure; Sandip Kundu (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Special session 12C: Town-hall meeting "young professionals in test". - Alodeep Sanyal; Yervant Zorian (VTS, 2013)

Special session 11C: Young professionals in test - Elevator talks. - Alodeep Sanyal; Yanjing Li (VTS, 2014)

Special session 12C: Young professionals in test - Town meeting. - Alodeep Sanyal; Yanjing Li; Yervant Zorian (VTS, 2014)

DFM-aware fault model and ATPG for intra-cell and inter-cell defects. - Arani Sinha; Sujay Pandey; Ayush Singhal; Alodeep Sanyal; Alan Schmaltz (ITC, 2017)