Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures. - Rajeev Balasubramonian; David H. Albonesi; Alper Buyuktosunoglu; Sandhya Dwarkadas (MICRO, 2000)

An Adaptive Issue Queue for Reduced Power at High Performance. - Alper Buyuktosunoglu; Stanley Schuster; David M. Brooks; Pradip Bose; Peter W. Cook; David H. Albonesi (PACS, 2000)

Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. - David M. Brooks; Pradip Bose; Stanley Schuster; Hans M. Jacobson; Prabhakar Kudva; Alper Buyuktosunoglu; John-David Wellman; Victor V. Zyuban; Manish Gupta; Peter W. Cook (IEEE Micro, 2000)

A circuit level implementation of an adaptive issue queue for power-aware microprocessors. - Alper Buyuktosunoglu; David H. Albonesi; Stanley Schuster; David M. Brooks; Pradip Bose; Peter W. Cook (ACM Great Lakes Symposium on VLSI, 2001)

Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors. - Brian W. Curran; Mary Gifaldi; Jason Martin; Alper Buyuktosunoglu; Martin Margala; David H. Albonesi (VLSI-SOC, 2001)

Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power. - Steve Dropsho; Alper Buyuktosunoglu; Rajeev Balasubramonian; David H. Albonesi; Sandhya Dwarkadas; Greg Semeraro; Grigorios Magklis; Michael L. Scott (IEEE PACT, 2002)

Tradeoffs in power-efficient issue queue design. - Alper Buyuktosunoglu; David H. Albonesi; Pradip Bose; Peter W. Cook; Stanley Schuster (ISLPED, 2002)

Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. - Pradip Bose; David M. Brooks; Alper Buyuktosunoglu; Peter W. Cook; K. Das; Philip G. Emma; Michael Gschwind; Hans M. Jacobson; Tejas Karkhanis; Prabhakar Kudva; Stanley Schuster; James E. Smith 001; et al. (PACS, 2002)

Energy Efficient Co-Adaptive Instruction Fetch and Issue. - Alper Buyuktosunoglu; Tejas Karkhanis; David H. Albonesi; Pradip Bose (ISCA, 2003)

Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches. - Rajeev Balasubramonian; Viji Srinivasan; Sandhya Dwarkadas; Alper Buyuktosunoglu (PACS, 2003)

Dynamically Tuning Processor Resources with Adaptive Processing. - David H. Albonesi; Rajeev Balasubramonian; Steve Dropsho; Sandhya Dwarkadas; Eby G. Friedman; Michael C. Huang 001; Volkan Kursun; Grigorios Magklis; Michael L. Scott; Greg Semeraro; Pradip Bose; Alper Buyuktosunoglu; et al. (Computer, 2003)

A Dynamically Tunable Memory Hierarchy. - Rajeev Balasubramonian; David H. Albonesi; Alper Buyuktosunoglu; Sandhya Dwarkadas (IEEE Trans. Computers, 2003)

Microarchitectural techniques for power gating of execution units. - Zhigang Hu; Alper Buyuktosunoglu; Viji Srinivasan; Victor V. Zyuban; Hans M. Jacobson; Pradip Bose (ISLPED, 2004)

Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. - Hans M. Jacobson; Pradip Bose; Zhigang Hu; Alper Buyuktosunoglu; Victor V. Zyuban; Richard J. Eickemeyer; Lee Eisen; John Griswell; Doug Logan; Balaram Sinharoy; Joel M. Tendler (HPCA, 2005)

A High Performance, Energy Efficient GALS ProcessorMicroarchitecture with Reduced Implementation Complexity. - Yongkang Zhu; David H. Albonesi; Alper Buyuktosunoglu (ISPASS, 2005)

Long-Term Workload Phases: Duration Predictions and Applications to DVFS. - Canturk Isci; Alper Buyuktosunoglu; Margaret Martonosi (IEEE Micro, 2005)

An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. - Canturk Isci; Alper Buyuktosunoglu; Chen-Yong Cher; Pradip Bose; Margaret Martonosi (MICRO, 2006)

Performance modeling for early analysis of multi-core systems. - Reinaldo A. Bergamaschi; Indira Nair; Gero Dittmann; Hiren D. Patel; Geert Janssen; Nagu R. Dhanwada; Alper Buyuktosunoglu; Emrah Acar; Gi-Joon Nam; Dorothy Kucar; Pradip Bose; John A. Darringer; et al. (CODES+ISSS, 2007)

Predicting Program Behavior Based On Objective Function Minimization. - Ruhi Sarikaya; Alper Buyuktosunoglu (IISWC, 2007)

Evaluating design tradeoffs in on-chip power management for CMPs. - Joseph J. Sharkey; Alper Buyuktosunoglu; Pradip Bose (ISLPED, 2007)

Exploring power management in multi-core systems. - Reinaldo A. Bergamaschi; Guoling Han; Alper Buyuktosunoglu; Hiren D. Patel; Indira Nair; Gero Dittmann; Geert Janssen; Nagu R. Dhanwada; Zhigang Hu; Pradip Bose; John A. Darringer (ASP-DAC, 2008)

Software-Controlled Priority Characterization of POWER5 Processor. - Carlos Boneti; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Chen-Yong Cher; Mateo Valero (ISCA, 2008)

ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs. - Carlos Luque; Miquel Moretó; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Mateo Valero (PACT, 2009)

Dynamic power gating with quality guarantees. - Anita Lungu; Pradip Bose; Alper Buyuktosunoglu; Daniel J. Sorin (ISLPED, 2009)

CPU Accounting in CMP Processors. - Carlos Luque; Miquel Moretó; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Mateo Valero (IEEE Comput. Archit. Lett., 2009)

Power and thermal characterization of POWER6 system. - Víctor Jiménez; Francisco J. Cazorla; Roberto Gioiosa; Mateo Valero; Carlos Boneti; Eren Kursun; Chen-Yong Cher; Canturk Isci; Alper Buyuktosunoglu; Pradip Bose (PACT, 2010)

Power-efficient, reliable microprocessor architectures: modeling and design methods. - Pradip Bose; Alper Buyuktosunoglu; Chen-Yong Cher; John A. Darringer; Meeta Sharma Gupta; Hendrik F. Hamann; Hans M. Jacobson; Prabhakar Kudva; Eren Kursun; Niti Madan; Indira Nair; Jude A. Rivers; et al. (ACM Great Lakes Symposium on VLSI, 2010)

Power and performance aware reconfigurable cache for CMPs. - Kamil Kedzierski; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Mateo Valero (IFMT, 2010)

Runtime workload behavior prediction using statistical metric modeling with application to dynamic power management. - Ruhi Sarikaya; Canturk Isci; Alper Buyuktosunoglu (IISWC, 2010)

Guarded Power Gating in a Multi-core Setting. - Niti Madan; Alper Buyuktosunoglu; Pradip Bose; Murali Annavaram (ISCA Workshops, 2010)

Program behavior prediction using a statistical metric model. - Ruhi Sarikaya; Canturk Isci; Alper Buyuktosunoglu (SIGMETRICS, 2010)

Trends and techniques for energy efficient architectures. - Víctor Jiménez; Roberto Gioiosa; Eren Kursun; Francisco J. Cazorla; Chen-Yong Cher; Alper Buyuktosunoglu; Pradip Bose; Mateo Valero (VLSI-SoC, 2010)

A Unified Prediction Method for Predicting Program Behavior. - Ruhi Sarikaya; Alper Buyuktosunoglu (IEEE Trans. Computers, 2010)

Abstraction and microarchitecture scaling in early-stage power modeling. - Hans M. Jacobson; Alper Buyuktosunoglu; Pradip Bose; Emrah Acar; Richard J. Eickemeyer (HPCA, 2011)

A case for guarded power gating for multi-core processors. - Niti Madan; Alper Buyuktosunoglu; Pradip Bose; Murali Annavaram (HPCA, 2011)

Characterizing Power and Temperature Behavior of POWER6-Based System. - Víctor Jiménez; Francisco J. Cazorla; Roberto Gioiosa; Mateo Valero; Carlos Boneti; Eren Kursun; Chen-Yong Cher; Canturk Isci; Alper Buyuktosunoglu; Pradip Bose (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Adaptive energy-management features of the IBM POWER7 chip. - Michael S. Floyd; Malcolm Allen-Ware; Karthick Rajamani; Tilman Gloekler; Bishop Brock; Pradip Bose; Alper Buyuktosunoglu; Juan C. Rubio; Birgit Schubert; Bruno Spruth; José A. Tierno; Lorena Pesantez (IBM J. Res. Dev., 2011)

Introducing the Adaptive Energy Management Features of the Power7 Chip. - Michael S. Floyd; Malcolm Allen-Ware; Karthick Rajamani; Bishop Brock; Charles Lefurgy; Alan J. Drake; Lorena Pesantez; Tilman Gloekler; José A. Tierno; Pradip Bose; Alper Buyuktosunoglu (IEEE Micro, 2011)

Energy-Aware Accounting and Billing in Large-Scale Computing Facilities. - Víctor Jiménez; Francisco J. Cazorla; Roberto Gioiosa; Eren Kursun; Canturk Isci; Alper Buyuktosunoglu; Pradip Bose; Mateo Valero (IEEE Micro, 2011)

Making data prefetch smarter: adaptive prefetching on POWER7. - Víctor Jiménez; Roberto Gioiosa; Francisco J. Cazorla; Alper Buyuktosunoglu; Pradip Bose; Francis P. O'Connell (PACT, 2012)

Power management of multi-core chips: Challenges and pitfalls. - Pradip Bose; Alper Buyuktosunoglu; John A. Darringer; Meeta Sharma Gupta; Michael B. Healy; Hans M. Jacobson; Indira Nair; Jude A. Rivers; Jeonghee Shin; Augusto Vega; Alan J. Weger (DATE, 2012)

Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor. - Augusto Vega; Pradip Bose; Alper Buyuktosunoglu; Jeff H. Derby; Michele Franceschini; Charles Johnson; Robert K. Montoye (HPCA, 2012)

Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks. - Ramon Bertran; Alper Buyuktosunoglu; Meeta Sharma Gupta; Marc González 001; Pradip Bose (MICRO, 2012)

Accurate Fine-Grained Processor Power Proxies. - Wei Huang 004; Charles Lefurgy; William Kuk; Alper Buyuktosunoglu; Michael S. Floyd; Karthick Rajamani; Malcolm Allen-Ware; Bishop Brock (MICRO, 2012)

Energy-Aware Computing. - Thomas F. Wenisch; Alper Buyuktosunoglu (IEEE Micro, 2012)

CPU Accounting for Multicore Processors. - Carlos Luque; Miquel Moretó; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Mateo Valero (IEEE Trans. Computers, 2012)

SMT-centric power-aware thread placement in chip multiprocessors. - Augusto Vega; Alper Buyuktosunoglu; Pradip Bose (PACT, 2013)

Crank it up or dial it down: coordinated multiprocessor frequency and folding control. - Augusto Vega; Alper Buyuktosunoglu; Heather Hanson; Pradip Bose; Srinivasan Ramani (MICRO, 2013)

SMT Switch: Software Mechanisms for Power Shifting. - Priyanka Tembey; Augusto Vega; Alper Buyuktosunoglu; Dilma Da Silva; Pradip Bose (IEEE Comput. Archit. Lett., 2013)

Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems. - Ramon Bertran; Yutaka Sugawara; Hans M. Jacobson; Alper Buyuktosunoglu; Pradip Bose (IBM J. Res. Dev., 2013)

SMT Malleability in IBM POWER5 and POWER6 Processors. - Alessandro Morari; Carlos Boneti; Francisco J. Cazorla; Roberto Gioiosa; Chen-Yong Cher; Alper Buyuktosunoglu; Pradip Bose; Mateo Valero (IEEE Trans. Computers, 2013)

Runtime Application Behavior Prediction Using a Statistical Metric Model. - Ruhi Sarikaya; Canturk Isci; Alper Buyuktosunoglu (IEEE Trans. Computers, 2013)

3D stacking of high-performance processors. - Philip G. Emma; Alper Buyuktosunoglu; Michael B. Healy; Krishnan Kailas; Valentin Puente; Roy Yu; Allan Hartstein; Pradip Bose; Jaime H. Moreno; Eren Kursun (HPCA, 2014)

Characterization of transient error tolerance for a class of mobile embedded applications. - Liang Wang 055; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose; Kevin Skadron (IISWC, 2014)

Empirically derived abstractions in uncore power modeling for a server-class processor chip. - Hans M. Jacobson; Arun Joseph; Dharmesh Parikh; Pradip Bose; Alper Buyuktosunoglu (ISLPED, 2014)

NDC: Analyzing the impact of 3D-stacked memory+logic devices on MapReduce workloads. - Seth H. Pugsley; Jeffrey Jestes; Huihui Zhang; Rajeev Balasubramonian; Vijayalakshmi Srinivasan; Alper Buyuktosunoglu; Al Davis; Feifei Li 001 (ISPASS, 2014)

Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities. - Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose; Timothy J. Slegel; Gerard Salem; Sean M. Carey; Richard F. Rizzolo; Thomas Strach (MICRO, 2014)

Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads. - Seth H. Pugsley; Jeffrey Jestes; Rajeev Balasubramonian; Vijayalakshmi Srinivasan; Alper Buyuktosunoglu; Al Davis; Feifei Li 001 (IEEE Micro, 2014)

Special Series on Harsh Chips [Guest editors' introduction]. - Augusto Vega; Alper Buyuktosunoglu; Pradip Bose (IEEE Micro, 2014)

Adaptive Prefetching on POWER7: Improving Performance and Power Consumption. - Víctor Jiménez; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Pradip Bose; Francis P. O'Connell; Bruce G. Mealey (ACM Trans. Parallel Comput., 2014)

Increasing multicore system efficiency through intelligent bandwidth shifting. - Víctor Jiménez; Alper Buyuktosunoglu; Pradip Bose; Francis P. O'Connell; Francisco J. Cazorla; Mateo Valero (HPCA, 2015)

Resilient, UAV-embedded real-time computing. - Augusto Vega; Chung-Ching Lin; Karthik Swaminathan; Alper Buyuktosunoglu; Sharathchandra Pankanti; Pradip Bose (ICCD, 2015)

Resilient mobile cognition: Algorithms, innovations, and architectures. - Raphael Viguier; Chung-Ching Lin; Karthik Swaminathan; Augusto Vega; Alper Buyuktosunoglu; Sharathchandra Pankanti; Pradip Bose; H. Akbarpour; Filiz Bunyak; Kannappan Palaniappan; Guna Seetharaman (ICCD, 2015)

Power-efficient embedded processing with resilience and real-time constraints. - Liang Wang 055; Augusto Vega; Alper Buyuktosunoglu; Pradip Bose; Kevin Skadron (ISLPED, 2015)

Safe limits on voltage reduction efficiency in GPUs: a direct measurement approach. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Vijay Janapa Reddi (MICRO, 2015)

Robust power management in the IBM z13. - Tobias Webel; Preetham M. Lobo; Ramon Bertran; Gerard Salem; Malcolm Allen-Ware; Richard F. Rizzolo; Sean M. Carey; Thomas Strach; Alper Buyuktosunoglu; Charles Lefurgy; Pradip Bose; Ricardo Nigaglioni; et al. (IBM J. Res. Dev., 2015)

Characterization and mitigation of power contention across multiprogrammed workloads. - Hiroshi Sasaki 001; Alper Buyuktosunoglu; Augusto Vega; Pradip Bose (IISWC, 2016)

Resilience characterization of a vision analytics application under varying degrees of approximation. - Radha Venkatagiri; Karthik Swaminathan; Chung-Ching Lin; Liang Wang 055; Alper Buyuktosunoglu; Pradip Bose; Sarita V. Adve (IISWC, 2016)

Measurement-Driven Methodology for Evaluating Processor Heterogeneity Options for Power-Performance Efficiency. - William J. Song; Alper Buyuktosunoglu; Chen-Yong Cher; Pradip Bose (ISLPED, 2016)

BRAVO: Balanced Reliability-Aware Voltage Optimization. - Karthik Swaminathan; Nandhini Chandramoorthy; Chen-Yong Cher; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose (HPCA, 2017)

Very Low Voltage (VLV) Design. - Ramon Bertran; Pradip Bose; David M. Brooks; Jeff Burns; Alper Buyuktosunoglu; Nandhini Chandramoorthy; Eric Cheng; Martin Cochet; Schuyler Eldridge; Daniel Friedman; Hans M. Jacobson; Rajiv V. Joshi; et al. (ICCD, 2017)

Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. - Eric Cheng; Jacob A. Abraham; Pradip Bose; Alper Buyuktosunoglu; Keith A. Campbell; Deming Chen; Chen-Yong Cher; Hyungmin Cho; Binh Q. Le; Klas Lilja; Shahrzad Mirkhani; Kevin Skadron; et al. (ICCD, 2017)

libPRISM: an intelligent adaptation of prefetch and SMT levels. - Cristobal Ortega; Miquel Moretó; Marc Casas; Ramon Bertran; Alper Buyuktosunoglu; Alexandre E. Eichenberger; Pradip Bose (ICS, 2017)

Invited paper: Resilient and energy-secure power management. - Pradip Bose; Alper Buyuktosunoglu (ISLPED, 2017)

Invited paper: Secure swarm intelligence: A new approach to many-core power management. - Augusto Vega; Alper Buyuktosunoglu; Pradip Bose (ISLPED, 2017)

26.2 Power supply noise in a 22nm z13™ microprocessor. - Pierce I-Jen Chuang; Christos Vezyrtzis; Divya Pathak; Richard F. Rizzolo; Tobias Webel; Thomas Strach; Otto A. Torreiter; Preetham Lobo; Alper Buyuktosunoglu; Ramon Bertran; Michael S. Floyd; Malcolm S. Ware; et al. (ISSCC, 2017)

Mitigating Power Contention: A Scheduling Based Approach. - Hiroshi Sasaki 001; Alper Buyuktosunoglu; Augusto Vega; Pradip Bose (IEEE Comput. Archit. Lett., 2017)

Machine learning techniques for taming the complexity of modern hardware design. - Matthew M. Ziegler; Ramon Bertran Monfort; Alper Buyuktosunoglu; Pradip Bose (IBM J. Res. Dev., 2017)

Architectural Support for Cognitive Processing. - Pradip Bose; Alper Buyuktosunoglu (IEEE Micro, 2017)

Dyhard-DNN: even more DNN acceleration with dynamic hardware reconfiguration. - Mateja Putic; Swagath Venkataramani; Schuyler Eldridge; Alper Buyuktosunoglu; Pradip Bose; Mircea Stan (DAC, 2018)

Energy-secure swarm power management. - Augusto Vega; Alper Buyuktosunoglu; Pradip Bose (DATE, 2018)

Impact of Software Approximations on the Resiliency of a Video Summarization System. - Radha Venkatagiri; Karthik Swaminathan; Chung-Ching Lin; Liang Wang 055; Alper Buyuktosunoglu; Pradip Bose; Sarita V. Adve (DSN, 2018)

ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks. - Calvin Bulla; Lluc Alvarez; Miquel Moretó; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose (IISWC, 2018)

Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor. - Christos Vezyrtzis; Thomas Strach; Pierce I-Jen Chuang; Preetham Lobo; Richard F. Rizzolo; Tobias Webel; Pawel Owczarczyk; Alper Buyuktosunoglu; Ramon Bertran; David T. Hui; Susan M. Eickhoff; Michael S. Floyd; et al. (ISSCC, 2018)

Towards "Smarter" Vehicles Through Cloud-Backed Swarm Cognition. - Augusto Vega; Alper Buyuktosunoglu; Pradip Bose (Intelligent Vehicles Symposium, 2018)

Attaché: Towards Ideal Memory Compression by Mitigating Metadata Bandwidth Overheads. - Seokin Hong; Prashant Jayaprakash Nair; Bülent Abali; Alper Buyuktosunoglu; Kyu-Hyoun Kim; Michael B. Healy (MICRO, 2018)

IBM z14 design methodology enhancements in the 14-nm technology node. - Christopher J. Berry; James D. Warnock; John Badar; Dean G. Bair; Erwin Behnen; Brian Bell 001; Alper Buyuktosunoglu; Chris Cavitt; Pierce Chuang; Ofer Geva; Dina Hamid; John Isakson; et al. (IBM J. Res. Dev., 2018)

IBM POWER9 circuit design and energy optimization for 14-nm technology. - Eric J. Fluhr; Rahul M. Rao; Howard Smith; Alper Buyuktosunoglu; Ramon Bertran Monfort (IBM J. Res. Dev., 2018)

Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. - Eric Cheng; Daniel Mueller-Gritschneder; Jacob A. Abraham; Pradip Bose; Alper Buyuktosunoglu; Deming Chen; Hyungmin Cho; Yanjing Li; Uzair Sharif; Kevin Skadron; Mircea Stan; Ulf Schlichtmann; et al. (DAC, 2019)

Power Aware Heterogeneous Node Assembly. - Bilge Acun; Alper Buyuktosunoglu; Eun Kyung Lee; Yoonho Park (HPCA, 2019)

Resilient Low Voltage Accelerators for High Energy Efficiency. - Nandhini Chandramoorthy; Karthik Swaminathan; Martin Cochet; Arun Paidimarri; Schuyler Eldridge; Rajiv V. Joshi; Matthew M. Ziegler; Alper Buyuktosunoglu; Pradip Bose (HPCA, 2019)

A Highly Efficient Distributed Deep Learning System for Automatic Speech Recognition. - Wei Zhang 022; Xiaodong Cui; Ulrich Finkler; George Saon; Abdullah Kayi; Alper Buyuktosunoglu; Brian Kingsbury; David S. Kung 001; Michael Picheny (INTERSPEECH, 2019)

Touché: Towards Ideal and Efficient Cache Compression By Mitigating Tag Area Overheads. - Seokin Hong; Bülent Abali; Alper Buyuktosunoglu; Michael B. Healy; Prashant J. Nair (MICRO, 2019)

Asymmetric Resilience for Accelerator-Rich Systems. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Vijay Janapa Reddi (IEEE Comput. Archit. Lett., 2019)

IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems. - Christopher J. Berry; David Wolpert 001; Christos Vezyrtzis; Richard F. Rizzolo; Sean M. Carey; Yaniv Maroz; Hunter F. Shi; Dureseti Chidambarrao; Christian Jacobi 002; Anthony Saporito; Thomas Strach; Alper Buyuktosunoglu; et al. (IEEE J. Solid State Circuits, 2019)

Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Quan Chen 002; Minyi Guo; Vijay Janapa Reddi (HPCA, 2020)

Improving Efficiency in Large-Scale Decentralized Distributed Training. - Wei Zhang 022; Xiaodong Cui; Abdullah Kayi; Mingrui Liu; Ulrich Finkler; Brian Kingsbury; George Saon; Youssef Mroueh; Alper Buyuktosunoglu; Payel Das; David S. Kung 001; Michael Picheny (ICASSP, 2020)

Data Compression Accelerator on IBM POWER9 and z15 Processors : Industrial Product. - Bülent Abali; Bart Blaner; John J. Reilly; Matthias Klein; Ashutosh Mishra; Craig B. Agricola; Bedri Sendir; Alper Buyuktosunoglu; Christian Jacobi 002; William J. Starke; Haren Myneni; Charlie Wang (ISCA, 2020)

2.7 IBM z15: A 12-Core 5.2GHz Microprocessor. - Christopher J. Berry; Brian Bell 001; Adam Jatkowski; Jesse Surprise; John Isakson; Ofer Geva; Brian Deskin; Mark Cichanowski; Dina Hamid; Chris Cavitt; Gregory Fredeman; Anthony Saporito; et al. (ISSCC, 2020)

STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors. - Augusto Vega; Aporva Amarnath; John-David Wellman; Hiwot Kassa; Subhankar Pal; Hubertus Franke; Alper Buyuktosunoglu; Ronald G. Dreslinski; Pradip Bose (CoRR, 2020)

Proactive power management in IBM z15. - Tobias Webel; Preetham M. Lobo; Thomas Strach; Pradeep Bhadravati Parashurama; Srinivas Purushotham; Ramon Bertran; Alper Buyuktosunoglu (IBM J. Res. Dev., 2020)

Hardware Support for Low-Cost Memory Safety. - Rick Boivie; Gururaj Saileshwar; Tong Chen 001; Benjamin Segal; Alper Buyuktosunoglu (DSN (Supplements), 2021)

Energy Efficiency Boost in the AI-Infused POWER10 Processor. - Brian W. Thompto; Dung Q. Nguyen; José E. Moreira; Ramon Bertran; Hans M. Jacobson; Richard J. Eickemeyer; Rahul M. Rao; Michael Goulet; Marcy Byers; Christopher J. Gonzalez; Karthik Swaminathan; Nagu R. Dhanwada; et al. (ISCA, 2021)

NOVIA: A Framework for Discovering Non-Conventional Inline Accelerators. - David Trilla; John-David Wellman; Alper Buyuktosunoglu; Pradip Bose (MICRO, 2021)

Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles. - Aporva Amarnath; Subhankar Pal; Hiwot Tadese Kassa; Augusto Vega; Alper Buyuktosunoglu; Hubertus Franke; John-David Wellman; Ronald Dreslinski Jr.; Pradip Bose (IEEE Comput. Archit. Lett., 2021)

TokenSmart: Distributed, Scalable Power Management in the Many-Core Era. - Parth Shah; Ranjal Gautham Shenoy; Vaidyanathan Srinivasan; Pradip Bose; Alper Buyuktosunoglu (IEEE Comput. Archit. Lett., 2021)

Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15. - David Wolpert 001; Christopher J. Berry; Brian Bell 001; Adam Jatkowski; Jesse Surprise; John Isakson; Ofer Geva; Brian Deskin; Mark Cichanowski; Dina Hamid; Chris Cavitt; Gregory Fredeman; et al. (IEEE J. Solid State Circuits, 2021)

Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption. - Cristobal Ortega; Lluc Alvarez; Marc Casas; Ramon Bertran; Alper Buyuktosunoglu; Alexandre E. Eichenberger; Pradip Bose; Miquel Moretó (IEEE Trans. Computers, 2021)

Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Yazhou Zu; Vijay Janapa Reddi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Erratum to "Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs". - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Yazhou Zu; Vijay Janapa Reddi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

On the Scalability of HeapCheck. - Rick Boivie; Gururaj Saileshwar; Tong Chen 001; Benjamin Segal; Alper Buyuktosunoglu (DSN (Supplements), 2022)

AI accelerator on IBM telum processor: industrial product. - Cédric Lichtenau; Alper Buyuktosunoglu; Ramon Bertran; Peter Figuli; Christian Jacobi 002; Nikolaos Papandreou; Haris Pozidis; Anthony Saporito; Andrew Sica; Elpida Tzortzatos (ISCA, 2022)

IBM Telum: a 16-Core 5+ GHz DCM. - Ofer Geva; Christopher J. Berry; Robert J. Sonnelitter; David Wolpert 001; Adam Collura; Thomas Strach; Di Phan; Cédric Lichtenau; Alper Buyuktosunoglu; Hubert Harrer; Jeffrey A. Zitz; Chad Marquart; et al. (ISSCC, 2022)

Cloud-backed mobile cognition. - Augusto Vega; Alper Buyuktosunoglu; Davide Callegaro; Marco Levorato; Pradip Bose (Computing, 2022)

HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs. - Aporva Amarnath; Subhankar Pal; Hiwot Kassa; Augusto Vega; Alper Buyuktosunoglu; Hubertus Franke; John-David Wellman; Ronald G. Dreslinski; Pradip Bose (CoRR, 2022)

HE-PEx: Efficient Machine Learning under Homomorphic Encryption using Pruning, Permutation and Expansion. - Ehud Aharoni; Moran Baruch; Pradip Bose; Alper Buyuktosunoglu; Nir Drucker; Subhankar Pal; Tomer Pelleg; Kanthi K. Sarpatwar; Hayim Shaul; Omri Soceanu; Roman Vaculín (CoRR, 2022)

HeapCheck: Low-cost Hardware Support for Memory Safety. - Gururaj Saileshwar; Rick Boivie; Tong Chen 001; Benjamin Segal; Alper Buyuktosunoglu (ACM Trans. Archit. Code Optim., 2022)

Characterization and Exploration of Latch Checkers for Efficient RAS Protection. - Karthik Swaminathan; Ramon Bertran; Doug Balazich; Alper Buyuktosunoglu; Arvind Haran; Sean M. Carey; Karl Anderson; Hans M. Jacobson; Matthias Pflanz; Pradip Bose (DSN-S, 2023)

Efficient Pruning for Machine Learning Under Homomorphic Encryption. - Ehud Aharoni; Moran Baruch; Pradip Bose; Alper Buyuktosunoglu; Nir Drucker; Subhankar Pal; Tomer Pelleg; Kanthi K. Sarpatwar; Hayim Shaul; Omri Soceanu; Roman Vaculín (ESORICS (4), 2023)

SoCurity: A Design Approach for Enhancing SoC Security. - Naorin Hossain; Alper Buyuktosunoglu; John-David Wellman; Pradip Bose; Margaret Martonosi (IEEE Comput. Archit. Lett., 2023)

Adaptive Power Shifting for Power-Constrained Heterogeneous Systems. - Cristobal Ortega; Lluc Alvarez; Alper Buyuktosunoglu; Ramon Bertran; Todd Rosedahl; Pradip Bose; Miquel Moretó (IEEE Trans. Computers, 2023)

FitBit: Ensuring Robust and Secure Execution Through Runtime-Generated Stressmarks. - Karthik Swaminathan; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose (HOST, 2024)

Enterprise-Class Cache Compression Design. - Alper Buyuktosunoglu; David Trilla; Bülent Abali; Deanna Postles Dunn Berger; Craig R. Walters; Jang-Soo Lee (HPCA, 2024)

BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs. - Martin Cochet; Karthik Swaminathan; Erik Jens Loscalzo; Joseph Zuckerman; Maico Cassel dos Santos; Davide Giri; Alper Buyuktosunoglu; Tianyu Jia; David Brooks 001; Gu-Yeon Wei; Kenneth L. Shepard; Luca P. Carloni; et al. (ISCA, 2024)

14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration. - Maico Cassel dos Santos; Tianyu Jia; Joseph Zuckerman; Martin Cochet; Davide Giri; Erik Jens Loscalzo; Karthik Swaminathan; Thierry Tambe; Jeff Jun Zhang; Alper Buyuktosunoglu; Kuan-Lin Chiu; Giuseppe Di Guglielmo; et al. (ISSCC, 2024)

Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms. - Yongmo Park; Subhankar Pal; Aporva Amarnath; Karthik Swaminathan; Wei D. Lu; Alper Buyuktosunoglu; Pradip Bose (IEEE Comput. Archit. Lett., 2024)

ARTEMIS: Agile Discovery of Efficient Real-Time Systems-on-Chips in the Heterogeneous Era. - Subhankar Pal; Aporva Amarnath; Behzad Boroujerdian; Augusto Vega; Alper Buyuktosunoglu; John-David Wellman; Vijay Janapa Reddi; Pradip Bose (HPCA, 2025)

FHENDI: A Near-DRAM Accelerator for Compiler-Generated Fully Homomorphic Encryption Applications. - Yongmo Park; Aporva Amarnath; Subhankar Pal; Karthik Swaminathan; Alper Buyuktosunoglu; Hayim Shaul; Ehud Aharoni; Nir Drucker; Wei D. Lu; Omri Soceanu; Pradip Bose (HPCA, 2025)

Enterprise Class Modular Cache Hierarchy. - Craig R. Walters; Deanna Postles Dunn Berger; Robert J. Sonnelitter; Alper Buyuktosunoglu (HPCA, 2025)

8.1 Dynamic Guard-Band Features of the IBM zNext System. - Tobias Webel; Phillip J. Restle; Ramon Bertran; Alper Buyuktosunoglu; Sean M. Carey; Alejandro Cook; Karl Anderson; Michael Romain; Thomas Strach; Pradeep Bhadravati Parashurama; Aishwarya Tadkase; Rahman Abber Tahir; et al. (ISSCC, 2025)