Etude des parties opératives à éléments modulaires pour processeurs monolithiques. - Altamiro A. Suzim (1981)

SHC-SLX: A levelized compiled, event driven interpreted VLSI simulator. - Luigi Carro; César A. M. Marcon; Altamiro A. Suzim (Microprocess. Microprogramming, 1993)

Algorithms and architectures to computational systems implementation. - Luigi Carro; Altamiro A. Suzim (RSP, 1994)

System Design using ASIPs. - Luigi Carro; G. A. Pereira; C. Alba; Altamiro Amadeu Susin (ECBS, 1996)

A Risc Architecture to Explore HW/SW Parallelism in HW/SW Co-Design. - Luigi Carro; Altamiro Amadeu Susin (ECBS, 1996)

Embedded Systems Design with Frontend Compilers. - C. Alba; Luigi Carro; A. Lima; Altamiro Amadeu Susin (ICCD, 1996)

Prototyping and reengineering of microcontroller-based systems. - Luigi Carro; C. Pereira; Altamiro A. Suzim (RSP, 1996)

F-Timer: dedicated FPGA to real-time systems design support. - A. Parisoto; Adão Antônio de Souza Jr.; Luigi Carro; M. Pontremoli; C. Pereira; Altamiro A. Suzim (RTS, 1997)

A New Automatic Circular Decomposition Algorithm Applied to Blood Cells Image. - Leticia V. Guimaraes; Altamiro A. Suzim; Junji Maeda (BIBE, 2000)

Communication Architectures for System-on-Chip. - Márcio Eduardo Kreutz; Luigi Carro; Cesar A. Zeferino; Altamiro Amadeu Susin (SBCCI, 2001)

Análise e Seleção de Redes de Interconexão para Síntese de Sistemas no Ambiente S3E2S. - Márcio Eduardo Kreutz; César Albenes Zeferino; Luigi Carro; Altamiro Amadeu Susin (RITA, 2001)

Complex Adaptive Signal Processing for Analog Testing. - Adão Antonio de Souza Junior; Marcelo Negreiros; Luigi Carro; Altamiro A. Suzim (LATW, 2002)

A Noise Generator for Analog-to-Digital Converter Testing. - M. G. C. Flores; Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (SBCCI, 2002)

Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy. - Renato Fernandes Hentschke; Felipe S. Marques 001; Fernanda Lima 001; Luigi Carro; Altamiro Amadeu Susin; Ricardo Reis 001 (SBCCI, 2002)

A Statistical Sampler for Increasing Analog Circuits Observability. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (SBCCI, 2002)

Analysis and Implementation of a Stochastic Multiplier for Electrical Power Measurement. - André Borin Soares; Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (SBCCI, 2002)

A Study on Communication Issues for Systems-on-Chip. - Cesar A. Zeferino; Márcio Eduardo Kreutz; Luigi Carro; Altamiro Amadeu Susin (SBCCI, 2002)

Ultimate low cost analog BIST. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (DAC, 2003)

Testing RF Signal Paths Using Spectral Analysis and Subsampling. - Marcelo Negreiros; Erik Schüler; Luigi Carro; Altamiro Amadeu Susin (SBCCI, 2003)

SoCIN: A Parametric and Scalable Network-on-Chip. - César Albenes Zeferino; Altamiro Amadeu Susin (SBCCI, 2003)

The Impact of NoC Reuse on the Testing of Core-based Systems. - Érika F. Cota; Márcio Eduardo Kreutz; Cesar A. Zeferino; Luigi Carro; Marcelo Lubaszewski; Altamiro Amadeu Susin (VTS, 2003)

Ultra Low Cost Analog BIST Using Spectral Analysis. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (VTS, 2003)

A Statistical Sampler for a New On-Line Analog Test Method. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (J. Electron. Test., 2003)

Testing analog circuits using spectral analysis. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (Microelectron. J., 2003)

Classification of event-related potentials in individuals at risk for alcoholism using wavelet transform and artificial neural network. - Carla D. Lopes; Josias O. Mainardi; Milton A. Zaro; Altamiro Amadeu Susin (CIBCB, 2004)

Low Cost Analog Testing of RF Signal Paths. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (DATE, 2004)

RASoC: A Router Soft-Core for Networks-on-Chip. - César Albenes Zeferino; Márcio Eduardo Kreutz; Altamiro Amadeu Susin (DATE, 2004)

Towards a BIST technique for noise figure evaluation. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (ETS, 2004)

Gradient Pile up Algorithm for Edge Enhancement and Detection. - Leticia V. Guimaraes; André Borin Soares; Viviane Cordeiro; Altamiro Amadeu Susin (ICIAR (1), 2004)

Low Cost On-Line Testing of RF Circuits. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (IOLTS, 2004)

A comparison of totally digital ADCs for SOCs. - Josias O. Mainardi; Adão Antônio de Souza Jr.; Luigi Carro; Altamiro Amadeu Susin (ISCAS (1), 2004)

Abstract RTOS Modeling for Embedded Systems. - Fabiano Hessel; Vitor M. da Rosa; Igor M. Reis; Ricardo Planner; César A. M. Marcon; Altamiro Amadeu Susin (IEEE International Workshop on Rapid System Prototyping, 2004)

ParIS: a parameterizable interconnect switch for networks-on-chip. - César Albenes Zeferino; Frederico G. M. E. Santo; Altamiro Amadeu Susin (SBCCI, 2004)

INL and DNL estimation based on noise for ADC test. - Maria Da Gloria Flores; Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (IEEE Trans. Instrum. Meas., 2004)

Time and energy efficient mapping of embedded applications onto NoCs. - César A. M. Marcon; André Borin Suarez; Altamiro Amadeu Susin; Luigi Carro; Flávio Rech Wagner (ASP-DAC, 2005)

ERP signal identification of Individuals at Risk for Alcoholism using Learning Vector Quantization Network. - Carla D. Lopes; Erik Schüler; Paulo Engel; Altamiro Amadeu Susin (CIBCB, 2005)

Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. - César A. M. Marcon; Ney Laert Vilar Calazans; Fernando Gehm Moraes; Altamiro Amadeu Susin; Igor M. Reis; Fabiano Hessel (DATE, 2005)

Noise Figure Evaluation Using Low Cost BIST. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (DATE, 2005)

Design space exploration on heterogeneous network-on-chip. - Rodrigo Ferrugem Cardoso; Márcio Eduardo Kreutz; Luigi Carro; Altamiro Amadeu Susin (ISCAS (1), 2005)

Gradient pile up for edge detection on hardware. - Leticia V. Guimaraes; André Borin Soares; Viviane Cordeiro; Altamiro Amadeu Susin (ISCAS (6), 2005)

Energy and latency evaluation of NoC topologies. - Márcio Eduardo Kreutz; César A. M. Marcon; Luigi Carro; Altamiro Amadeu Susin; Ney Laert Vilar Calazans (ISCAS (6), 2005)

Models for Embedded Application Mapping onto NoCs: Timing Analysis. - César A. M. Marcon; Márcio Eduardo Kreutz; Altamiro Amadeu Susin; Ney Laert Vilar Calazans (IEEE International Workshop on Rapid System Prototyping, 2005)

Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures. - Márcio Eduardo Kreutz; César A. M. Marcon; Luigi Carro; Flávio Rech Wagner; Altamiro Amadeu Susin (SBCCI, 2005)

Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. - José Carlos S. Palma; César A. M. Marcon; Fernando Gehm Moraes; Ney Laert Vilar Calazans; Ricardo A. L. Reis; Altamiro Amadeu Susin (SBCCI, 2005)

Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. - César A. M. Marcon; José Carlos S. Palma; Ney Laert Vilar Calazans; Fernando Gehm Moraes; Altamiro Amadeu Susin; Ricardo Augusto da Luz Reis (VLSI-SoC, 2005)

Low Cost BIST for Static and Dynamic Testing of ADCs. - Maria Da Gloria Flores; Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin; Felipe R. Clayton; Cristiano Benevento (J. Electron. Test., 2005)

Low Cost On-Line Testing Strategy for RF Circuits. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (J. Electron. Test., 2005)

Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES' Platform. - Alex Ngouanga; Gilles Sassatelli; Lionel Torres; Thierry Gil; André Borin Suarez; Altamiro Amadeu Susin (ARC, 2006)

An improved RF loopback for test time reduction. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (DATE, 2006)

A Contextual Resources use: a Proof of Concept through the APACHES' Platform. - Alex Ngouanga; Gilles Sassatelli; Lionel Torres; André Borin Soares; Altamiro Amadeu Susin (DDECS, 2006)

FPGA Design of A H.264/AVC Main Profile Decoder for HDTV. - Luciano Volcan Agostini; Arnaldo Azevedo; Vagner S. Rosa; Eduardo A. Berriel; Tatiana Gadelha Serra dos Santos; Sergio Bampi; Altamiro Amadeu Susin (FPL, 2006)

Reconfigurable communications for image processing applications. - André Borin Soares; Luigi Carro; Altamiro Amadeu Susin (IPDPS, 2006)

Automatic generation of neural networks for image processing. - André Borin Soares; Altamiro Amadeu Susin; Leticia V. Guimaraes (ISCAS, 2006)

Architecture of an HDTV Intraframe Predictor for a H.264 Decoder. - Wagston T. Staehler; Eduardo A. Berriel; Altamiro Amadeu Susin; Sergio Bampi (VLSI-SoC, 2006)

Digital Generation of Signals for Low Cost RF BIST. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (ETS, 2007)

Quality Assessment of Non-Rigid Registration Methods for Atlas-Based Segmentation in Head-Neck Radiotherapy. - Adriane Parraga; Altamiro Amadeu Susin; Johanna Pettersson; Benoît Macq; Mathieu De Craene (ICASSP (1), 2007)

A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator. - Luciano Severino de Paula; Sergio Bampi; Eric E. Fabris; Altamiro Amadeu Susin (ICECS, 2007)

Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder. - Bruno Zatt; Arnaldo Azevedo; Luciano Volcan Agostini; Altamiro Amadeu Susin; Sergio Bampi (ISVLSI, 2007)

Non-rigid registration methods assessment of 3D CT images for head-neck radiotherapy. - Adriane Parraga; Johanna Pettersson; Altamiro Amadeu Susin; Mathieu De Craene; Benoît Macq (Image Processing, 2007)

High Throughput Hardware Architecture for Motion Estimation with 4: 1 Pel Subsampling Targeting Digital Television Applications. - Marcelo Schiavon Porto; Luciano Volcan Agostini; Leandro Rosa; Altamiro Amadeu Susin; Sergio Bampi (PSIVT, 2007)

A Pipelined 8x8 2-D Forward DCT Hardware Architecture for H.264/AVC High Profile Encoder. - Thaísa Leal da Silva; Cláudio Machado Diniz; João Alberto Vortmann; Luciano Volcan Agostini; Altamiro Amadeu Susin; Sergio Bampi (PSIVT, 2007)

Motion Compensation Hardware Accelerator Architecture for H.264/AVC. - Bruno Zatt; Valter Ferreira; Luciano Volcan Agostini; Flávio Rech Wagner; Altamiro Amadeu Susin; Sergio Bampi (PSIVT, 2007)

FPGA Prototyping Strategy for a H.264/AVC Video Decoder. - Vagner S. Rosa; Wagston T. Staehler; Arnaldo Azevedo; Bruno Zatt; Roger Endrigo Carvalho Porto; Luciano Volcan Agostini; Sergio Bampi; Altamiro Amadeu Susin (IEEE International Workshop on Rapid System Prototyping, 2007)

3D Atlas Building in the Context of Head and Neck Radiotherapy Based on Dense Deformation Fields. - Adriane Parraga; Altamiro Amadeu Susin; Johanna Pettersson; Benoît Macq; Mathieu De Craene (SIBGRAPI, 2007)

An HDTV H.264 deblocking filter in FPGA with RGB video output. - Vagner S. Rosa; Altamiro Amadeu Susin; Sergio Bampi (VLSI-SoC, 2007)

RF Digital Signal Generation Beyond Nyquist. - Marcelo Negreiros; Adão Antônio de Souza Jr.; Luigi Carro; Altamiro Amadeu Susin (VTS, 2007)

Reducing Test Time Using an Enhanced RF Loopback. - Marcelo Negreiros; Luigi Carro; Altamiro Amadeu Susin (J. Electron. Test., 2007)

Design and FPGA Prototyping of a H.264/AVC Main Profile. - Luciano Volcan Agostini; Arnaldo P. Azevedo Filho; Wagston T. Staehler; Vagner S. Rosa; Bruno Zatt; Ana Cristina Medina Pinto; Roger Endrigo Carvalho Porto; Sergio Bampi; Altamiro Amadeu Susin (J. Braz. Comput. Soc., 2007)

A high throughput and low cost diamond search architecture for HDTV motion estimation. - Marcelo Schiavon Porto; Luciano Volcan Agostini; Sergio Bampi; Altamiro Amadeu Susin (ICME, 2008)

HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV. - Bruno Zatt; Altamiro Amadeu Susin; Sergio Bampi; Luciano Volcan Agostini (ISCAS, 2008)

A new pipelined architecture of an H.264/MPEG-4 AVC deblocking filter. - Ronaldo Husemann; Altamiro Amadeu Susin; Valter Roesler (SBCCI, 2008)

A wide band CMOS differential voltage-controlled ring oscillator. - Luciano Severino de Paula; Altamiro Amadeu Susin; Sergio Bampi (SBCCI, 2008)

Architectural design for the new QSDS with dynamic iteration control motion estimation algorithm targeting HDTV. - Marcelo Schiavon Porto; Sergio Bampi; Altamiro Amadeu Susin; Luciano Volcan Agostini (SBCCI, 2008)

A new march sequence to fit DDR SDRAM test in burst mode. - André Borin Soares; Alexsandro Cristovão Bonatto; Altamiro Amadeu Susin (SBCCI, 2008)

High throughput architecture for H.264/AVC motion compensation sample interpolator for HDTV. - Bruno Zatt; Altamiro Amadeu Susin; Sergio Bampi; Luciano Volcan Agostini (SBCCI, 2008)

The Need for Reconfigurable Routers in Networks-on-Chip. - Debora Matos; Caroline Concatto; Luigi Carro; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin (ARC, 2009)

High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard. - Thaísa Leal da Silva; Bruno Zatt; Altamiro Amadeu Susin; Sergio Bampi; Luciano Volcan Agostini (ICECS, 2009)

A real time H.264/AVC intra frame prediction hardware architecture for HDTV 1080P video. - Cláudio Machado Diniz; Bruno Zatt; Luciano Volcan Agostini; Altamiro Amadeu Susin; Sergio Bampi (ICME, 2009)

NoC Power Optimization Using a Reconfigurable Router. - Caroline Concatto; Debora Matos; Luigi Carro; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin; Márcio Eduardo Kreutz (ISVLSI, 2009)

Low Cost and Memoryless CAVLD Architecture for H.264/AVC Decoder. - Thaísa Leal da Silva; João Alberto Vortmann; Luciano Volcan Agostini; Altamiro Amadeu Susin; Sergio Bampi (ISVLSI, 2009)

Adaptive router architecture based on traffic behavior observability. - Debora Matos; Caroline Concatto; Anelise Kologeski; Luigi Carro; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin; Márcio Eduardo Kreutz (NoCArc@MICRO, 2009)

A High Performance H.264 Deblocking Filter. - Vagner S. Rosa; Altamiro Amadeu Susin; Sergio Bampi (PSIVT, 2009)

Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router. - Caroline Concatto; Debora Matos; Luigi Carro; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin; Érika F. Cota; Márcio Eduardo Kreutz (SBCCI, 2009)

High performance and low cost architecture for H.264/AVC CAVLD targeting HDTV. - Thaísa Leal da Silva; Fábio I. Pereira; Altamiro Amadeu Susin; Sergio Bampi; Luciano Volcan Agostini (SBCCI, 2009)

Practical analysis and refinement of a SVC standard scalable vídeo coder. - Ronaldo Husemann; André Detsch; Valter Roesler; José Valdeni de Lima; Altamiro Amadeu Susin (WebMedia, 2009)

A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding. - Fábio Luís Livi Ramos; Bruno Zatt; Thaísa Leal da Silva; Altamiro Amadeu Susin; Sergio Bampi (ICECS, 2010)

Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs. - Debora Matos; Luigi Carro; Altamiro Amadeu Susin (ISCAS, 2010)

Highly Efficient Transforms Module Solution for a H.264/SVC Encoder. - Ronaldo Husemann; Mariano Majolo; Altamiro Amadeu Susin; Valter Roesler; José Valdeni de Lima (ISVLSI, 2010)

Highly efficient forward two-dimensional DCT module architecture for H.264/SVC. - Ronaldo Husemann; Mariano Majolo; Valter Roesler; José Valdeni de Lima; Altamiro Amadeu Susin (International Symposium on Rapid System Prototyping, 2010)

Proposal of an improved motion estimation module for SVC. - Ronaldo Husemann; Ricardo Kintschner; Valter Roesler; José Valdeni de Lima; Altamiro Amadeu Susin (SAC, 2010)

Monitor-adapter coupling for NOC performance tuning. - Debora Matos; Caroline Concatto; Anelise Kologeski; Luigi Carro; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin; Márcio Eduardo Kreutz (ICSAMOS, 2010)

A 720p H.264/AVC decoder ASIC implementation for digital television set-top boxes. - Alexsandro Cristovão Bonatto; André Borin Soares; Adriano Renner; Altamiro Amadeu Susin; Leandro Max Silva; Sergio Bampi (SBCCI, 2010)

Hardware integrated quantization solution for improvement of computational H.264 encoder module. - Ronaldo Husemann; Mariano Majolo; Victor Guimarães 002; Altamiro Amadeu Susin; Valter Roesler; José Valdeni de Lima (VLSI-SoC, 2010)

Network interface to synchronize multiple packets on NoC-based Systems-on-Chip. - Debora Matos; Miklecio Costa; Luigi Carro; Altamiro Amadeu Susin (VLSI-SoC, 2010)

High performance H.264/AVC encoding motion prediction algorithm. - Ronaldo Husemann; Valter Roesler; Ricardo Kintschner; Humberto Frohlich; Altamiro Amadeu Susin (ICIP, 2011)

A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p. - Cláudio Machado Diniz; Bruno Zatt; Cristiano Thiele; Altamiro Amadeu Susin; Sergio Bampi; Felipe Sampaio; Daniel Palomino 001; Luciano Volcan Agostini (ISCAS, 2011)

Embedded sensor system and techniques to evaluate the comfort in public transportation. - Juan C. Castellanos; Altamiro Amadeu Susin; Fabiano Fruett (ITSC, 2011)

Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip. - Debora Matos; Gianluca Palermo; Vittorio Zaccaria; Cezar Reinbrecht; Altamiro Amadeu Susin; Cristina Silvano; Luigi Carro (NoCArc@MICRO, 2011)

Efficient hardware solution for practical intra h.264/SVC video encoder implementation. - Ronaldo Husemann; Altamiro Amadeu Susin; Valter Roesler; José Valdeni de Lima (SBCCI, 2011)

Integration issues on the development of an h.264/AVC video decoder SoC for SBTVD set top box. - André Borin Soares; Alexsandro Cristovão Bonatto; Altamiro Amadeu Susin (SBCCI, 2011)

CAFES: A framework for intrachip application modeling and communication architecture design. - César A. M. Marcon; Ney Calazans; Edson I. Moreno; Fernando Moraes 001; Fabiano Hessel; Altamiro Amadeu Susin (J. Parallel Distributed Comput., 2011)

Reconfigurable Routers for Low Power and High Performance. - Debora Matos; Caroline Concatto; Márcio Eduardo Kreutz; Fernanda Lima Kastensmidt; Luigi Carro; Altamiro Amadeu Susin (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard. - Daniel Palomino 001; Felipe Sampaio; Luciano Volcan Agostini; Sergio Bampi; Altamiro Amadeu Susin (ICIP, 2012)

Floorplan-aware hierarchical NoC topology with GALS interfaces. - Debora Matos; Cezar Reinbrecht; Gianluca Palermo; Jonathan Martinelli; Altamiro Amadeu Susin; Cristina Silvano; Luigi Carro (ISCAS, 2012)

Namimote: A Low-Cost Sensor Node for Wireless Sensor Networks. - Ivan Müller; Edison Pignaton de Freitas; Altamiro Amadeu Susin; Carlos Eduardo Pereira (NEW2AN, 2012)

Towards an Efficient Memory Architecture for Video Decoding Systems. - Alexsandro Cristovão Bonatto; Marcelo Negreiros; André Borin Soares; Altamiro Amadeu Susin (SBESC, 2012)

Algorithm and Hardware Design of a Fast Intra Frame Mode Decision Module for H.264/AVC Encoders. - Daniel Palomino 001; Guilherme Corrêa 001; Cláudio Machado Diniz; Sergio Bampi; Luciano Volcan Agostini; Altamiro Amadeu Susin (Int. J. Reconfigurable Comput., 2012)

Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability. - Debora Matos; Cezar Reinbrecht; Márcio Eduardo Kreutz; Gianluca Palermo; Luigi Carro; Altamiro Amadeu Susin (ARC, 2013)

Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip. - Anelise Kologeski; Caroline Concatto; Debora Matos; Daniel Grehs; Tiago Motta; Felipe Almeida; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin; Ricardo Reis 001 (ICECS, 2013)

Memory subsystem architecture design for multimedia applications. - Alexsandro Cristovão Bonatto; Altamiro Amadeu Susin (ISVLSI, 2013)

Behavioral modeling of continuous-time ΣΔ modulators in matlab/simulink. - Paulo César Comassetto de Aguirre; Vinicius Camargo; Hamilton Klimach; Altamiro Amadeu Susin; Cesar Prior (LASCAS, 2013)

Fast HEVC intra mode decision algorithm based on new evaluation order in the Coding Tree Block. - Daniel Palomino 001; Eduardo Cavichioli; Altamiro Amadeu Susin; Luciano Volcan Agostini; Muhammad Shafique 001; Jörg Henkel (PCS, 2013)

A power-efficient hierarchical network-on-chip topology for stacked 3D ICs. - Debora Matos; Cezar Reinbrecht; Tiago Motta; Altamiro Amadeu Susin (VLSI-SoC, 2013)

Development of a SoC for Digital Television Set-Top Box: Architecture and System Integration Issues. - André Borin Soares; Alexsandro Cristovão Bonatto; Altamiro Amadeu Susin (Int. J. Reconfigurable Comput., 2013)

A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile. - Bruno Zatt; Leandro M. de L. Silva; Arnaldo Azevedo; Luciano Volcan Agostini; Altamiro Amadeu Susin; Sergio Bampi (J. Real Time Image Process., 2013)

A NOC closed-loop performance monitor and adapter. - Debora Matos; Caroline Concatto; Anelise Kologeski; Luigi Carro; Márcio Eduardo Kreutz; Fernanda Gusmão de Lima Kastensmidt; Altamiro Amadeu Susin (Microprocess. Microsystems, 2013)

hevcDTM: Application-driven Dynamic Thermal Management for High Efficiency Video Coding. - Daniel Palomino 001; Muhammad Shafique 001; Hussam Amrouch; Altamiro Amadeu Susin; Jörg Henkel (DATE, 2014)

H.264 8x8 inverse transform architecture optimization. - Fábio I. Pereira; André Borin Soarez; Altamiro Amadeu Susin; Alexsandro Cristovão Bonatto; Marcelo Negreiros (ACM Great Lakes Symposium on VLSI, 2014)

Run-time SoC memory subsystem mapping of heterogeneous clients. - Alexsandro Cristovão Bonatto; Altamiro Amadeu Susin (ISCAS, 2014)

Adaptive multiple switching strategy toward an ideal NoC. - Debora Matos; Márcio Eduardo Kreutz; Cezar Reinbrecht; Luigi Carro; Altamiro Amadeu Susin (ISCAS, 2014)

TONE: adaptive temperature optimization for the next generation video encoders. - Daniel Palomino 001; Muhammad Shafique 001; Altamiro Amadeu Susin; Jörg Henkel (ISLPED, 2014)

Ginga MiddleWare on a SoC for Digital Television Set-Top Box. - Bruno Policarpo Toledo Freitas; Altamiro Amadeu Susin; Alexsandro Cristovão Bonatto (LASCAS, 2014)

Adaptive Shared Memory Control for Multimedia Systems-on-Chip. - Alexsandro Cristovão Bonatto; Marcelo Negreiros; Fábio I. Pereira; André Borin Soares; Altamiro Amadeu Susin (SBCCI, 2014)

Performance evaluation of hierarchical NoC topologies for stacked 3D ICs. - Debora Matos; Max Prass; Márcio Eduardo Kreutz; Luigi Carro; Altamiro Amadeu Susin (ISCAS, 2015)

High compression ratio algorithm for power quality signals. - Roque Eduardo Dapper; Altamiro Amadeu Susin; Sergio Bampi; César David Paredes Crovato (ISIE, 2015)

A third-order 1 MHz continuous-time sigma-delta modulator in a 130 nm CMOS process. - Paulo César Comassetto de Aguirre; Hamilton Duarte Klimach; Altamiro Amadeu Susin (LASCAS, 2015)

PHiCIT: Improving Hierarchical Networks-on-chip through 3D Silicon Photonics Integration. - Cezar R. W. Reinbrecht; Martha Johanna Sepúlveda; Altamiro Amadeu Susin (SBCCI, 2015)

A novel caching algorithm for VoD proxy implementation and its evaluation including a new set of metrics for efficiency analysis. - Bruno S. Neves; Anderson S. Venturini; Altamiro Amadeu Susin (J. Braz. Comput. Soc., 2015)

Thermal optimization using adaptive approximate computing for video coding. - Daniel Palomino 001; Muhammad Shafique 001; Altamiro Amadeu Susin; Jörg Henkel (DATE, 2016)

An efficient sub-sample interpolator hardware for VP9-10 standards. - Guilherme Paim; Wagner Penny; Jones Goebel; Vladimir Afonso; Altamiro Amadeu Susin; Marcelo Schiavon Porto; Bruno Zatt; Luciano Volcan Agostini (ICIP, 2016)

Gossip NoC - Avoiding Timing Side-Channel Attacks through Traffic Management. - Cezar Reinbrecht; Altamiro Amadeu Susin; Lilian Bossuet; Johanna Sepúlveda (ISVLSI, 2016)

Adjusting video tiling to available resources in a per-frame basis in High Efficiency Video Coding. - Giovani Malossi; Daniel Palomino 001; Cláudio Machado Diniz; Altamiro Amadeu Susin; Sergio Bampi (NEWCAS, 2016)

A digitally tunable 4th-order Gm-C low-pass filter for multi-standards receivers. - Mateus S. Oliveira; Paulo César Comassetto de Aguirre; Lucas C. Severo; Alessandro Girardi; Altamiro Amadeu Susin (SBCCI, 2016)

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack. - Cezar Reinbrecht; Altamiro Amadeu Susin; Lilian Bossuet; Georg Sigl; Martha Johanna Sepúlveda (SBCCI, 2016)

Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip. - Vladimir Afonso; Altamiro Amadeu Susin; Luan Audibert; Mário Saldanha; Ruhan A. Conceição; Marcelo Schiavon Porto; Bruno Zatt; Luciano Volcan Agostini (ISCAS, 2017)

SEU susceptibility analysis of a feedforward neural network implemented in a SRAM-based FPGA. - Israel C. Lopes; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin (LATS, 2017)

Data compression and decompression Integrated Circuit for AC Power Quality data. - Marcos Hervé; Cristiano Thiele; Diogenes Machado; Guilherme Wojichowski; César Crovato; Sergio Bampi; Altamiro Amadeu Susin (NEWCAS, 2017)

Monocular Visual Odometry with Cyclic Estimation. - Fábio Irigon Pereira; Gustavo Ilha; Joel Luft; Marcelo Negreiros; Altamiro Amadeu Susin (SIBGRAPI, 2017)

Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection. - Cezar Reinbrecht; Altamiro Amadeu Susin; Lilian Bossuet; Georg Sigl; Johanna Sepúlveda (Microprocess. Microsystems, 2017)

Models of computation for NoC mapping: Timing and energy saving awareness. - César A. M. Marcon; Thais Webber; Altamiro Amadeu Susin (Microelectron. J., 2017)

A P300 potential evaluation wavelet method comparing individuals with high and low risk for alcoholism. - Carla D. Lopes; Tiago Becker; Alice J. Kozakevicius; Alberto A. Rasia-Filho; Benoît Macq; Altamiro Amadeu Susin (Neural Comput. Appl., 2017)

Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications. - Rodrigo Cataldo; Ramon Fernandes; Kevin J. M. Martin; Johanna Sepúlveda; Altamiro Amadeu Susin; César A. M. Marcon; Jean-Philippe Diguet (DAC, 2018)

A Framework for Automatic Recognition of Cell Damage on Microscopic Images using Artificial Neural Networks. - Mirayr R. Q. de Souza; Raphael Ruschel; Altamiro Amadeu Susin; Jane M. Boeira; Leticia V. Guimaraes; Adriane Parraga (EMBC, 2018)

Wheat Plots Segmentation for Experimental Agricultural Field from Visible and Multispectral UAV Imaging. - Adriane Parraga; Dionísio Doering; Joao Gustavo Atkinson; Thiago Bertani; Clodis de Oliveira Andrades Filho; Mirayr Raul Quadros de Souza; Raphael Ruschel; Altamiro Amadeu Susin (IntelliSys (1), 2018)

Hardware-Friendly Unidirectional Disparity-Search Algorithm for 3D-HEVC. - Vladimir Afonso; Altamiro Amadeu Susin; Murilo R. Perleberg; Ruhan A. Conceição; Guilherme Corrêa 001; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto (ISCAS, 2018)

Reliability analysis on case-study traffic sign convolutional neural network on APSoC. - Israel C. Lopes; Fabio Benevenuti; Fernanda Lima Kastensmidt; Altamiro Amadeu Susin; Paolo Rech (LATS, 2018)

A Power-Efficient and High-Throughput Hardware Design for 3D-HEVC Disparity Estimation. - Murilo R. Perleberg; Vladimir Afonso; Ruhan A. Conceição; Altamiro Amadeu Susin; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto (SBCCI, 2018)

Low-Power and High-Throughput Architecture for 3D-HEVC Depth Modeling Mode 4. - Mariana Ucker; Vladimir Afonso; Luan Audibert; Altamiro Amadeu Susin; Bruno Zatt; Marcelo Schiavon Porto; Luciano Volcan Agostini (SBCCI, 2018)

Optimized Solution to Accelerate in Hardware an Intra H.264/SVC Video Encoder. - Ronaldo Husemann; Altamiro Amadeu Susin; Valter Roesler (IEEE Micro, 2018)

A 0.6-V, 74.2-dB DR Continuous-Time Sigma-Delta Modulator With Inverter-Based Amplifiers. - Paulo César Comassetto de Aguirre; Altamiro Amadeu Susin (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Novel Resection-Intersection Algorithm With Fast Triangulation Applied to Monocular Visual Odometry. - Fábio I. Pereira; Joel Luft; Gustavo Ilha; Altamiro Amadeu Susin (IEEE Trans. Intell. Transp. Syst., 2018)

Energy-Aware Motion and Disparity Estimation System for 3D-HEVC With Run-Time Adaptive Memory Hierarchy. - Vladimir Afonso; Ruhan A. Conceição; Mário Saldanha; Luciano Almeida Braatz; Murilo R. Perleberg; Guilherme Corrêa 001; Marcelo Schiavon Porto; Luciano Agostini; Bruno Zatt; Altamiro Amadeu Susin (IEEE Trans. Circuits Syst. Video Technol., 2019)

High-Throughput Hardware Design for 3D-HEVC Disparity Estimation. - Murilo R. Perleberg; Altamiro Amadeu Susin; Vladimir Afonso; Luciano Agostini; Bruno Zatt; Marcelo Schiavon Porto; Ruhan A. Conceição (IEEE Des. Test, 2020)

High-Throughput Hardware for 3D-HEVC Depth-Map Intra Prediction. - Mariana Ucker; Vladimir Afonso; Mário Saldanha; Luan Audibert; Ruhan A. Conceição; Altamiro Amadeu Susin; Marcelo Schiavon Porto; Bruno Zatt; Luciano Agostini (IEEE Des. Test, 2020)

Complexity and compression efficiency assessment of 3D-HEVC encoder. - Mário Saldanha; Ruhan A. Conceição; Vladimir Afonso; Giovanni Avila; Altamiro Amadeu Susin; Marcelo Schiavon Porto; Bruno Zatt; Guilherme Corrêa 001; Luciano Agostini (Multim. Tools Appl., 2020)

A 170.7-dB FoM-DR 0.45/0.6-V Inverter-Based Continuous-Time Sigma-Delta Modulator. - Paulo César Comassetto de Aguirre; Edoardo Bonizzoni; Franco Maloberti; Altamiro Amadeu Susin (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Hardware Accelerator for Onboard Spatial Resolution Enhancement of Hyperspectral Images. - Felipe Viel; Wemerson Delcio Parreira; Altamiro Amadeu Susin; César Albenes Zeferino (IEEE Geosci. Remote. Sens. Lett., 2021)

Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices. - Geancarlo Abich; Anderson Ignacio da Silva; José Eduardo Thums; Rafael da Silva; Altamiro Amadeu Susin; Ricardo Reis 001; Luciano Ost (ISVLSI, 2023)

Power and Performance Costs of Radiation-Hardened ML Inference Models Running on Edge Devices. - Geancarlo Abich; Anderson Ignacio da Silva; Jonas Gava; Altamiro Amadeu Susin; Ricardo Augusto da Luz Reis; Luciano Ost (SBCCI, 2023)