A 4-path 42.8-to-49.5GHz LO generation with automatic phase tuning for 60GHz phased-array receivers. - Liang Wu 003; Alvin Li; Howard C. Luong (ISSCC, 2012)

A CMOS 21-48GHz fractional-N synthesizer employing ultra-wideband injection-locked frequency multipliers. - Alvin Li; Shiyuan Zheng; Jun Yin 001; Howard C. Luong; Xun Luo (CICC, 2013)

A 4-Path 42.8-to-49.5 GHz LO Generation With Automatic Phase Tuning for 60 GHz Phased-Array Receivers. - Liang Wu 003; Alvin Li; Howard C. Luong (IEEE J. Solid State Circuits, 2013)

A 21-48 GHz Subharmonic Injection-Locked Fractional-N Frequency Synthesizer for Multiband Point-to-Point Backhaul Communications. - Alvin Li; Shiyuan Zheng; Jun Yin 001; Xun Luo; Howard C. Luong (IEEE J. Solid State Circuits, 2014)

An inductor-less fractional-N injection-locked PLL with a spur-and-phase-noise filtering technique. - Alvin Li; Yue Chao; Xuan Chen; Liang Wu 003; Howard C. Luong (VLSI Circuits, 2016)

A Spur-and-Phase-Noise-Filtering Technique for Inductor-Less Fractional-N Injection-Locked PLLs. - Alvin Li; Yue Chao; Xuan Chen; Liang Wu 003; Howard C. Luong (IEEE J. Solid State Circuits, 2017)

A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration. - Liang Wu 003; Hiu Fai Leung; Alvin Li; Howard C. Luong (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A 0.9-5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration. - Liang Wu 003; Alan W. L. Ng; Shiyuan Zheng; Hiu Fai Leung; Yue Chao; Alvin Li; Howard C. Luong (IEEE Trans. Very Large Scale Integr. Syst., 2017)