A 1.0ns 64-bits GaAs Adder using Quad tree algorithm. - Philippe Royannez; Amara Amara (Great Lakes Symposium on VLSI, 1996)

Static power consumption management in CMOS memories. - Arnaud Turier; Lotfi Ben Ammar; Amara Amara (ISCAS (4), 2001)

An SOI 4 transistors self-refresh ultra-low-voltage memory cell. - Olivier Thomas; Amara Amara (ISCAS (5), 2003)

IRIS features extraction using wavelet packets. - Erik Rydgren; Thomas Ea; Frédéric Amiel; Florence Rossant; Amara Amara (ICIP, 2004)

Systems-on-chip for telecommunications. - Jean-François Naviner; Amara Amara (Ann. des Télécommunications, 2004)

Modeling subthreshold SOI logic for static timing analysis. - Alexandre Valentian; Olivier Thomas; Andrei Vladimirescu; Amara Amara (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Iris identification and robustness evaluation of a wavelet packets based algorithm. - Florence Rossant; Frédéric Amiel; Thomas Ea; Amara Amara; Manuel Torres Eslava (ICIP (3), 2005)

Ultra low voltage design considerations of SOI SRAM memory cells. - Olivier Thomas; Amara Amara (ISCAS (4), 2005)

Contribution of Custom Instructions on SoPC for iris recognition application. - Thomas Ea; Frédéric Amiel; Alicja Michalowska; Florence Rossant; Amara Amara (ICECS, 2006)

A Non-Volatile Multi-Level Memory Cell Using Molecular-Gated Nanowire Transistors. - Antoine Jalabert; Fabien Clermidy; Amara Amara (ICECS, 2006)

FPGA vs. ASIC for low power applications. - Amara Amara; Frédéric Amiel; Thomas Ea (Microelectron. J., 2006)

A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation. - Bastien Giraud; Amara Amara; Andrei Vladimirescu (ISCAS, 2007)

Read Stability and Write Ability Tradeoff for 6T SRAM Cells in Double-Gate CMOS. - Bastien Giraud; Amara Amara (DELTA, 2008)

An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch. - Piotr Nasalski; Adam Makosiej; Bastien Giraud; Andrei Vladimirescu; Amara Amara (ICECS, 2008)

A novel 4T asymmetric single-ended SRAM cell in sub-32 nm double gate technology. - Bastien Giraud; Amara Amara (ISCAS, 2008)

SRAM Voltage and Current Sense Amplifiers in sub-32nm Double-gate CMOS Insensitive to Process Variations and Transistor Mismatch. - Piotr Nasalski; Adam Makosiej; Bastien Giraud; Andrei Vladimirescu; Amara Amara (ISCAS, 2009)

An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology. - Amara Amara; Bastien Giraud; Olivier Thomas (DELTA, 2010)

32nm and beyond Multi-VT Ultra-Thin Body and BOX FDSOI: From device to circuit. - Olivier Thomas; Jean-Philippe Noel; Claire Fenouillet-Béranger; Marie-Anne Jaud; J. Dura; P. Perreau; Frédéric Boeuf; François Andrieu; D. Delprat; F. Boedt; Konstantin Bourdelle; Bich-Yen Nguyen; et al. (ISCAS, 2010)

An On-Chip Multi-Mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-Power Domain SoC Using a 65-nm Standard CMOS Logic Process. - Motoi Ichihashi; Hélène Lhermet; Edith Beigné; Frédéric Rothan; Marc Belleville; Amara Amara (J. Low Power Electron., 2010)

Design of an ultra low power MAC for a heterogeneous in-body sensor network. - Ashutosh Ghildiyal; Balwant Godara; Amara Amara (BODYNETS, 2011)

Multi-electrode system for pacemaker applications. - Islam Seoudi; Karima Amara; Fabrice Gayral; Renzo Dal Molin; Amara Amara (ICECS, 2011)

An Ultra-Low Power MAC Protocol for In-body Medical Implant Networks. - Ashutosh Ghildiyal; Balwant Godara; Amara Amara (MobiHealth, 2011)

Stability and yield-oriented ultra-low-power embedded 6T SRAM cell design optimization. - Adam Makosiej; Olivier Thomas; Andrei Vladimirescu; Amara Amara (DATE, 2012)

A 32nm tunnel FET SRAM for ultra low leakage. - Adam Makosiej; Rutwick Kumar Kashyap; Andrei Vladimirescu; Amara Amara; Costin Anghel (ISCAS, 2012)

Bipolar ReRAM Based non-volatile flip-flops for low-power architectures. - Santhosh Onkaraiah; Marina Reyboz; Fabien Clermidy; Jean-Michel Portal; Marc Bocquet; Christophe Muller; Hraziia; Costin Anghel; Amara Amara (NEWCAS, 2012)

Default connection in multi-electrode leads for cardiac pacemakers. - Islam Seoudi; Jean-Francois Debroux; Marc Laflutte; Alaa Makdissi; Karima Amara; Renzo Dal Molin; Amara Amara (NEWCAS, 2012)

CMOS SRAM scaling limits under optimum stability constraints. - Adam Makosiej; Olivier Thomas; Amara Amara; Andrei Vladimirescu (ISCAS, 2013)

Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications. - Navneet Gupta; Adam Makosiej; Oliver Thomas; Amara Amara; Andrei Vladimirescu; Costin Anghel (ISCAS, 2015)

0.5-V sub-ns open-BL SRAM array with mid-point-sensing multi-power 5T cell. - Kiyoo Itoh 002; Khaja Ahmad Shaik; Amara Amara (ISCAS, 2015)

Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes. - Andrei Vladimirescu; Costin Anghel; Amara Amara; Navneet Gupta; Adam Makosiej (IWASI, 2015)

Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology. - Amara Amara; Navneet Gupta; Khaja Ahmad Shaik; Costin Anghel; Kiyoo Itoh 002 (MIXDES, 2015)

Cross entropy-based automatic thresholds setting-up method for sleep staging system. - Chen Chen 039; Adrien Ugon; Xun Zhang 002; Amara Amara; Patrick Garda; Jean-Gabriel Ganascia; Amina Kotti; Carole Philippe; Andréa Pinna 001 (BioCAS, 2016)

3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (DATE, 2016)

Personalized sleep staging system using evolutionary algorithm and symbolic fusion. - Chen Chen 039; Adrien Ugon; Xun Zhang 002; Amara Amara; Patrick Garda; Jean-Gabriel Ganascia; Carole Philippe; Andréa Pinna 001 (EMBC, 2016)

16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (ESSDERC, 2016)

Uplink wireless transmission overview in bi-directional VLC systems. - Pablo Perez-Nicoli; Fernando Silveira; Xun Zhang 002; Amara Amara (ICECS, 2016)

Ultra-compact SRAM design using TFETs for low power low voltage applications. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (ISCAS, 2016)

A cost-effective approach for ubiquitous broadband access based on hybrid PLC-VLC system. - Jian Song 004; Sicong Liu 002; Guangxin Zhou; Bingyan Yu; Wenbo Ding 001; Fang Yang 001; Hongming Zhang 010; Xun Zhang 002; Amara Amara (ISCAS, 2016)

Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (ISQED, 2016)

0.5-V 50-mV-swing 1.2-GHz 28-nm-FD-SOI 32-bit dynamic bus architecture with dummy bus. - Khaja Ahmad Shaik; Kiyoo Itoh 002; Amara Amara (ISQED, 2016)

TFET NDR skewed inverter based sensing method. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Sorin Cotofana; Costin Anghel (NANOARCH, 2016)

0.5-V Sub-ns Open-BL SRAM Array with Mid-Point-Sensing Multi-Power-Supply 5T Cell. - Khaja Ahmad Shaik; Kiyoo Itoh 002; Amara Amara (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016)

Symbolic Fusion: A Novel Decision Support Algorithm for Sleep Staging Application. - Chen Chen 039; Xue Liu; Adrien Ugon; Xun Zhang 002; Amara Amara; Patrick Garda; Jean-Gabriel Ganascia; Carole Philippe; Andréa Pinna 001 (EAI Endorsed Trans. Pervasive Health Technol., 2016)

Tunnel FET based refresh-free-DRAM. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (DATE, 2017)

1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (ESSCIRC, 2017)

Tunnel FET based ultra-low-leakage compact 2T1C SRAM. - Navneet Gupta; Adam Makosiej; Andrei Vladimirescu; Amara Amara; Costin Anghel (ISQED, 2017)

Related references for extended TED submission (uDRAM and uSRAM reference papers). - Navneet Gupta; Adam Makosiej; Amara Amara; Andrei Vladimirescu; Costin Anghel (IEEE DataPort, 2018)

Peer Networking and Capacity Building for Child Protection Professionals - Lessons from "ChildHub". - Sendrine Constant; Balwant Godara; Thierry Agagliate; Nihaalini Kumar; Amara Amara (ICT4D (1), 2019)

ICTs as catalysts in child protection programmes: current landscape in South Asia & a concept to inform future use. - Balwant Godara; Nihaalini Kumar; Frederique Boursin; Gatienne Jobit; Amara Amara; Thierry Agagliate (ICTD, 2019)

Unobtrusive Smart Mat System for Sleep Posture Recognition. - Haikang Diao; Chen Chen 039; Wei Chen 015; Wei Yuan 005; Amara Amara (ISCAS, 2021)

Edge-Computing System Based on Smart Mat for Sleep Posture Recognition in IoMT. - Haikang Diao; Chen Chen 039; Xiangyu Liu; Amara Amara; Wei Chen 015 (MobiHealth, 2021)

Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC. - Navneet Gupta; Hitesh Shrimali; Adam Makosiej; Andrei Vladimirescu; Amara Amara (MWSCAS, 2021)

Deep Residual Networks for Sleep Posture Recognition With Unobtrusive Miniature Scale Smart Mat System. - Haikang Diao; Chen Chen 039; Wei Yuan 005; Amara Amara; Toshiyo Tamura; Jiahao Fan; Long Meng; Xiangyu Liu; Wei Chen 015 (IEEE Trans. Biomed. Circuits Syst., 2021)

Improving the quality of anthropometric measures during medical consultations with children aged under five years old in Burkina Faso. - Aziza Merzouki; Wessel Valkenburg; Marc Bayala; Maroussia Roelens; Olivia Keiser; Amara Amara (BHI, 2022)

Real-Time and Cost-Effective Smart Mat System Based on Frequency Channel Selection for Sleep Posture Recognition in IoMT. - Haikang Diao; Chen Chen 039; Xiangyu Liu; Wei Yuan 005; Amara Amara; Toshiyo Tamura; Benny Lo; Jiahao Fan; Long Meng; Sio-Hang Pun; Yuan-Ting Zhang; Wei Chen 015 (IEEE Internet Things J., 2022)

Predicting Feeding Conditions of Premature Infants Through Non-Nutritive Sucking Skills Using a Sensitized Pacifier. - Saeed Akbarzadeh; Tianchan Lyu; Roozbeh Farhoodi; Muhammad Awais 008; Saadullah Farooq Abbasi; Xian Zhao; Chen Chen 039; Amara Amara; Yasemin M. Akay; Metin Akay; Wei Chen 015 (IEEE Trans. Biomed. Eng., 2022)

ASP: A daptive Sparse LUT-based Bit-Slice Accelerator for Efficient CNN Inference. - Yueting Li; Yulong Qiu; Amara Amara (ISCAS, 2025)

CCSMRI: Circular compressed sensing MRI. - Honggui Li; Dingtai Li; Sinan Chen; Nahid Md Lokman Hossain; Xinfeng Xu; Yuting Feng; Hantao Lu; Maria Trocan; Dimitri Galayko; Amara Amara; Mohamad Sawan (Biomed. Signal Process. Control., 2026)