Network-on-chip service guarantees on the kalray MPPA-256 bostan processor. - Benoît Dupont de Dinechin; Amaury Graillat (AISTECS@HiPEAC, 2017)

Feed-Forward Routing for the Wormhole Switching Network-on-Chip of the Kalray MPPA2 Processor. - Benoît Dupont de Dinechin; Amaury Graillat (NoCArc@MICRO, 2017)

Parallel code generation of synchronous programs for a many-core architecture. - Amaury Graillat; Matthieu Moy; Pascal Raymond; Benoît Dupont de Dinechin (DATE, 2018)

Génération de code pour un many-core avec des contraintes temps réel fortes. (Code Generation for Multi-Core Processor with Hard Real-Time Constraints). - Amaury Graillat (2018)

Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip. - Amaury Graillat; Claire Maiza; Matthieu Moy; Pascal Raymond; Benoît Dupont de Dinechin (RTNS, 2019)

Correct-by-Construction Parallelization of Hard Real-Time Avionics Applications on Off-the-Shelf Predictable Hardware. - Keryan Didier; Dumitru Potop-Butucaru; Guillaume Iooss; Albert Cohen 001; Jean Souyris; Philippe Baufreton; Amaury Graillat (ACM Trans. Archit. Code Optim., 2019)

Bounding the delays of the MPPA network-on-chip with network calculus: Models and benchmarks. - Marc Boyer; Amaury Graillat; Benoît Dupont de Dinechin; Jörn Migge (Perform. Evaluation, 2020)