CESC: a visual formalism for specification and verification of SoCs. - Ambar A. Gadkari; S. Ramesh 001; Rubin A. Parekhji (ACM Great Lakes Symposium on VLSI, 2004)

Automated Synthesis of Assertion Monitors using Visual Specifications. - Ambar A. Gadkari; S. Ramesh 002 (DATE, 2005)

AutoMOTGen: Automatic Model Oriented Test Generator for Embedded Control Systems. - Ambar A. Gadkari; Anand Yeolekar; J. Suresh; S. Ramesh 002; Swarup Mohalik; K. C. Shashidhar (CAV, 2008)

Rigorous model-based design & verification flow for in-vehicle software. - S. Ramesh 002; Ambar A. Gadkari (DAC, 2011)

Scenario-Based Specification of Automotive Requirements With Quantitative Constraints and Synthesis of SL/SF Monitors. - Silky Arora; Ambar A. Gadkari; S. Ramesh 002 (IEEE Embed. Syst. Lett., 2011)

An integrated test generation tool for enhanced coverage of Simulink/Stateflow models. - Prakash Mohan Peranandam; Sachin Raviram; Manoranjan Satpathy; Anand Yeolekar; Ambar A. Gadkari; S. Ramesh 002 (DATE, 2012)

Automatic test case generation from Simulink/Stateflow models using model checking. - Swarup Mohalik; Ambar A. Gadkari; Anand Yeolekar; K. C. Shashidhar; S. Ramesh 002 (Softw. Test. Verification Reliab., 2014)