Timing-driven variation-aware nonuniform clock mesh synthesis. - Ameer Abdelhadi; Ran Ginosar; Avinoam Kolodny; Eby G. Friedman (ACM Great Lakes Symposium on VLSI, 2010)

Configuration Bitstream Reduction for SRAM-based FPGAs by Enumerating LUT Input Permutations. - Ameer Abdelhadi; Guy G. F. Lemieux (ReConFig, 2011)

Pipeline frequency boosting: Hiding dual-ported block RAM latency using intentional clock skew. - Alexander Brant; Ameer Abdelhadi; Aaron Severance; Guy G. F. Lemieux (FPT, 2012)

Safe Overclocking of Tightly Coupled CGRAs and Processor Arrays using Razor. - Alexander Brant; Ameer Abdelhadi; Douglas H. H. Sim; Shao Lin Tang; Michael Xi Yue; Guy G. F. Lemieux (FCCM, 2013)

Timing-driven variation-aware synthesis of hybrid mesh/tree clock distribution networks. - Ameer Abdelhadi; Ran Ginosar; Avinoam Kolodny; Eby G. Friedman (Integr., 2013)

Modular multi-ported SRAM-based memories. - Ameer Abdelhadi; Guy G. F. Lemieux (FPGA, 2014)

Deep and narrow binary content-addressable memories using FPGA-based BRAMs. - Ameer M. S. Abdelhadi; Guy G. F. Lemieux (FPT, 2014)

Modular SRAM-Based Binary Content-Addressable Memories. - Ameer M. S. Abdelhadi; Guy G. F. Lemieux (FCCM, 2015)

A Multi-ported Memory Compiler Utilizing True Dual-Port BRAMs. - Ameer M. S. Abdelhadi; Guy G. F. Lemieux (FCCM, 2016)

Modular Switched Multiported SRAM-Based Memories. - Ameer M. S. Abdelhadi; Guy G. F. Lemieux (ACM Trans. Reconfigurable Technol. Syst., 2016)

Interleaved Architectures for High-Throughput Synthesizable Synchronization FIFOs. - Ameer M. S. Abdelhadi; Mark R. Greenstreet (ASYNC, 2017)

Modular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable Memories. - Ameer M. S. Abdelhadi; Guy G. F. Lemieux; Lesley Shannon (FPL, 2018)

Accelerated Approximate Nearest Neighbors Search Through Hierarchical Product Quantization. - Ameer M. S. Abdelhadi; Christos-Savvas Bouganis; George A. Constantinides (FPT, 2019)

Revisiting Deep Learning Parallelism: Fine-Grained Inference Engine Utilizing Online Arithmetic. - Ameer M. S. Abdelhadi; Lesley Shannon (FPT, 2019)

Synthesizable Synchronization FIFOs Utilizing the Asynchronous Pulse-Based Handshake Protocol. - Ameer M. S. Abdelhadi (NorCAS, 2020)

Reconfigurable Synthesizable Synchronization FIFOs. - Ameer M. S. Abdelhadi; He Li 008 (FCCM, 2021)

Enabling Mixed-Timing NoCs for FPGAs: Reconfigurable Synthesizable Synchronization FIFOs. - Ameer M. S. Abdelhadi; He Li 008 (FPL, 2021)

Noema: Hardware-Efficient Template Matching for Neural Population Pattern Detection. - Ameer M. S. Abdelhadi; Eugene Sha; Ciaran Bannon; Hendrik Steenland; Andreas Moshovos (MICRO, 2021)

Boveda: Building an On-Chip Deep Learning Memory Hierarchy Brick by Brick. - Isak Edo Vivancos; Sayeh Sharify; Daniel Ly-Ma; Ameer Abdelhadi; Ciaran Bannon; Milos Nikolic 002; Mostafa Mahmoud; Alberto Delmas Lascorz; Gennady Pekhimenko; Andreas Moshovos (MLSys, 2021)

Adversarial Hardware With Functional and Topological Camouflage. - He Li 008; Ameer Abdelhadi; Runbin Shi; Jiliang Zhang 002; Qiang Liu 011 (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Massive-Scale Brain Activity Decoding Chip. - Ameer Abdelhadi; Eugene Sha; Andreas Moshovos (HCS, 2022)

Mokey: enabling narrow fixed-point inference for out-of-the-box floating-point transformer models. - Ali Hadi Zadeh; Mostafa Mahmoud; Ameer Abdelhadi; Andreas Moshovos (ISCA, 2022)

A 39, 000 Subexposures/s CMOS Image Sensor with Dual-tap Coded-exposure Data-memory Pixel for Adaptive Single-shot Computational Imaging. - Rahul Gulve; Navid Sarhangnejad; Gairik Dutta; Motasem Sakr; Don Nguyen; Roberto Rangel; Wenzheng Chen; Zhengfan Xia; Mian Wei; Nikita Gusev; Esther Y. H. Lin; Xiaonong Sun; et al. (VLSI Technology and Circuits, 2022)

Schrödinger's FP: Dynamic Adaptation of Floating-Point Containers for Deep Learning Training. - Milos Nikolic 002; Enrique Torres-Sánchez; Jiahui Wang; Ali Hadi Zadeh; Mostafa Mahmoud; Ameer Abdelhadi; Andreas Moshovos (CoRR, 2022)

39 000-Subexposures/s Dual-ADC CMOS Image Sensor With Dual-Tap Coded-Exposure Pixels for Single-Shot HDR and 3-D Computational Imaging. - Rahul Gulve; Navid Sarhangnejad; Gairik Dutta; Motasem Sakr; Don Nguyen; Roberto Rangel; Wenzheng Chen; Zhengfan Xia; Mian Wei; Nikita Gusev; Esther Y. H. Lin; Xiaonong Sun; et al. (IEEE J. Solid State Circuits, 2023)

Every Bit Matters: A Hardware/Software Approach for Enabling More Powerful Machine Learning Models. - Enrique Torres-Sánchez; Milos Nikolic 002; Kareem Ibrahim; Alberto Delmas Lascorz; Ali Hadi Zadeh; Jiahui Wang; Ameer Abdelhadi; Mostafa Mahmoud; Christina Giannoula; Andreas Moshovos (IEEECONF, 2024)

Atalanta: A Bit is Worth a "Thousand" Tensor Values. - Alberto Delmas Lascorz; Mostafa Mahmoud; Ali Hadi Zadeh; Milos Nikolic 002; Kareem Ibrahim; Christina Giannoula; Ameer Abdelhadi; Andreas Moshovos (ASPLOS (2), 2024)

Marple: Scalable Spike Sorting for Untethered Brain-Machine Interfacing. - Eugene Sha; Andy Liu; Kareem Ibrahim; Mostafa Mahmoud; Christina Giannoula; Ameer Abdelhadi; Andreas Moshovos (ASPLOS (2), 2024)

HEPPO: Hardware-Efficient Proximal Policy Optimization a Universal Pipelined Architecture for Generalized Advantage Estimation. - Hazem Taha; Ameer M. S. Abdelhadi (ICFPT, 2024)

Schrodinger's FP Training Neural Networks with Dynamic Floating-Point Containers. - Milos Nikolic 002; Enrique Torres-Sánchez; Jiahui Wang; Ali Hadi Zadeh; Mostafa Mahmoud; Ameer Abdelhadi; Kareem Ibrahim; Andreas Moshovos (MLSys, 2024)

ARUC-GAN: A CycleGAN-Based Attention Residual U-Net for Low-Dose CT Denoising in Smart Healthcare. - Mohammad Mansour; Djamel Djenouri; Lobna A. Said; Shahid Latif; Ahmed Maalel; Ameer M. S. Abdelhadi (IEEE Access, 2025)