A low complexity architecture for the cell search applied to the LTE systems. - Ameneh Golnari; Golnoosh Sharifan; Yalda Amini; Mahdi Shabany (ICECS, 2012)

Error-Tolerant Processors: Formal Specification and Verification. - Ameneh Golnari; Yakir Vizel; Sharad Malik (ICCAD, 2015)

Design and Implementation of Time and Frequency Synchronization in LTE. - Ameneh Golnari; Mahdi Shabany; S. Alireza Nezamalhosseini; P. Glenn Gulak (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Evaluating matrix representations for error-tolerant computing. - Pareesa Ameneh Golnari; Sharad Malik (DATE, 2017)

PPU: A Control Error-Tolerant Processor for Streaming Applications with Formal Guarantees. - Pareesa Ameneh Golnari; Yavuz Yetim; Margaret Martonosi; Yakir Vizel; Sharad Malik (ACM J. Emerg. Technol. Comput. Syst., 2017)

Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration. - Sharad Malik; Pareesa Ameneh Golnari (ASAP, 2019)

Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration (long version). - Pareesa Ameneh Golnari; Sharad Malik (CoRR, 2019)

Selective Guidance: Are All the Denoising Steps of Guided Diffusion Important? - Pareesa Ameneh Golnari; Zhewei Yao; Yuxiong He (CoRR, 2023)

LoRA-Enhanced Distillation on Guided Diffusion Models. - Pareesa Ameneh Golnari (CoRR, 2023)

RenAIssance: A Survey Into AI Text-to-Image Generation in the Era of Large Model. - Fengxiang Bie; Yibo Yang; Zhongzhu Zhou; Adam Ghanem; Minjia Zhang; Zhewei Yao; Xiaoxia Wu; Connor Holmes; Pareesa Ameneh Golnari; David A. Clifton; Yuxiong He; Dacheng Tao; et al. (IEEE Trans. Pattern Anal. Mach. Intell., 2025)