Efficient assertion based verification using TLM. - Ali Habibi; Sofiène Tahar; Amer Samarah; Donglin Li; Otmane Aït Mohamed (DATE, 2006)

Automated Coverage Directed Test Generation Using a Cell-Based Genetic Algorithm. - Amer Samarah; Ali Habibi; Sofiène Tahar; Nawwaf Kharma (HLDVT, 2006)

Towards a Faster Simulation of SystemC Designs. - Ali Habibi; Haja Moinudeen; Amer Samarah; Sofiène Tahar (ISVLSI, 2006)

A dead-zone free and linearized digital PLL. - Amer Samarah; Anthony Chan Carusone (ICECS, 2012)

A Digital Phase-Locked Loop With Calibrated Coarse and Stochastic Fine TDC. - Amer Samarah; Anthony Chan Carusone (IEEE J. Solid State Circuits, 2013)

Multi-phase bang-bang digital phase lock loop with accelerated frequency acquisition. - Amer Samarah; Anthony Chan Carusone (ISCAS, 2015)

Cycle-slipping pull-in range of bang-bang PLLs. - Amer Samarah; Anthony Chan Carusone (NEWCAS, 2015)