Amin Khajeh

Affiliations:

Broadcom Limited, San Jose, CA, USA
Intel Labs, Hillsboro, OR, USA
Qualcomm Inc., Austin, TX, USA
University of California, Irvine, Departmentof Electrical Engineering and Computer Science, CA, USA

According to our database¹, Amin Khajeh authored at least 31 papers between 2007 and 2018.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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In proceedings

Article

PhD thesis

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Other

Bibliography

2018

Enhancing Power, Performance, and Energy Efficiency in Chip Multiprocessors Exploiting Inverse Thermal Dependence.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2018

2017

Microarchitecture-Level SoC Design.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Hardware/Software Codesign., 2017

Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Efficient pulsed-latch implementation for multiport register files: work-in-progress.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Compilers, 2017

2016

A System-Level Exploration of Power Delivery Architectures for Near-Threshold Manycores Considering Performance Constraints.

[BibT_eX]

[DOI]

Ioannis S. Stamelakos

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Revisiting Dynamic Thermal Management Exploiting Inverse Thermal Dependence.

[BibT_eX]

[DOI]

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2014

Multicopy Cache: A Highly Energy-Efficient Cache Architecture.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2014

Joint Power Management and Adaptive Modulation and Coding for Wireless Communications Systems With Unreliable Buffering Memories.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Equi-Noise: A Statistical Model That Combines Embedded Memory Failures and Channel Noise.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013

A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2013

Low overhead correction scheme for unreliable LDPC buffering.

[BibT_eX]

[DOI]

Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Error-aware power management for memory dominated OFDM systems.

[BibT_eX]

[DOI]

Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012

Error-Aware Algorithm/Architecture Coexploration for Video Over Wireless Applications.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2012

Fast error aware model for arithmetic and logic circuits.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011

Embedded Memories Fault-Tolerant Pre- and Post-Silicon Optimization.

[BibT_eX]

[DOI]

Amin Khajeh

Ahmed M. Eltawil

Fadi J. Kurdahi

IEEE Trans. Very Large Scale Integr. Syst., 2011

A Class of Low Power Error Compensation Iterative Decoders.

[BibT_eX]

[DOI]

Proceedings of the Global Communications Conference, 2011

Reliability-aware placement in SRAM-based FPGA for voltage scaling realization in the presence of process variations.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

2010

Low-Power Multimedia System Design by Aggressive Voltage Scaling.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2010

Effect of body biasing on embedded SRAM failure.

[BibT_eX]

[DOI]

Amin Khajeh

Ahmed M. Eltawil

Fadi J. Kurdahi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A Unified Hardware and Channel Noise Model for Communication Systems.

[BibT_eX]

[DOI]

Proceedings of the Global Communications Conference, 2010

Process variation aware transcoding for low power H.264 decoding.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, 2010

E < MC2: less energy through multi-copy cache.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Compilers, 2010

2009

A Low Power JPEG2000 Encoder With Iterative and Fault Tolerant Error Concealment.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

TRAM: A tool for Temperature and Reliability Aware Memory Design.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Cross-layer co-exploration of exploiting error resilience for video over wireless applications.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2008

2007

Fault Tolerant Approaches Targeting Ultra Low Power Communications System Design.

[BibT_eX]

[DOI]

Amin Khajeh Djahromi

Ahmed M. Eltawil

Fadi J. Kurdahi

Proceedings of the 65th IEEE Vehicular Technology Conference, 2007

Cross Layer Error Exploitation for Aggressive Voltage Scaling.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Limits on voltage scaling for caches utilizing fault tolerant techniques.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Computer Design, 2007

Power Management for Cognitive Radio Platforms.

[BibT_eX]

[DOI]

Proceedings of the Global Communications Conference, 2007

Error-Aware Design.

[BibT_eX]

[DOI]

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Exploiting Fault Tolerance Towards Power Efficient Wireless Multimedia Applications.

[BibT_eX]

[DOI]

Amin Khajeh Djahromi

Ahmed M. Eltawil

Fadi J. Kurdahi

Proceedings of the 4th IEEE Consumer Communications and Networking Conference, 2007

Amin Khajeh

Timeline

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