Hybrid lattice reduction algorithm and its implementation on an SDR baseband processor for LTE. - Ubaid Ahmad; Min Li 001; Sofie Pollin; Amir Amin; Liesbet Van der Perre; Rudy Lauwereins (EUSIPCO, 2011)

Scalable Block-Based Parallel Lattice Reduction Algorithm for an SDR Baseband Processor. - Ubaid Ahmad; Amir Amin; Min Li 001; Sofie Pollin; Liesbet Van der Perre; Francky Catthoor (ICC, 2011)

Overview of a Software Defined Downlink Inner Receiver for Category-E LTE-Advanced UE. - Min Li 001; Raf Appeltans; Amir Amin; Rodolfo Torrea Duran; Hans Cappelle; Matthias Hartmann; Hidekuni Yomo; Kiyotaka Kobayashi; Antoine Dejonghe; Liesbet Van der Perre (ICC, 2011)

A flexible platform architecture for Gbps wireless communication. - Jeroen Declerck; Prabhat Avasare; Miguel Glassee; Amir Amin; Erik Umans; Andy Dewilde; Praveen Raghavan; Martin Palkovic (ISSoC, 2012)

Exploration of Full HD Media Decoding on SDR Baseband Processor. - Chen Mei; Min Li 001; Peng Cao 002; Amir Amin; Chunshu Li; Sofie Pollin; Jun Yang 006 (SiPS, 2012)

Algorithm-Architecture Co-Optimization of Area-Efficient SDR Baseband for Highly Diversified Digital TV Standards. - Kiyotaka Kobayashi; Hidekuni Yomo; Min Li 001; Raf Appeltans; Hans Cappelle; Amir Amin; Aïssa Couvreur; Matthias Hartmann; André Bourdoux; Praveen Raghavan; Antoine Dejonghe; Liesbet Van der Perre (VTC Spring, 2012)

A C-programmable baseband processor with inner modem implementations for LTE Cat-4/5/7 and Gbps 80MHz 4×4 802.11ac (invited). - Min Li 001; Amir Amin; Raf Appeltans; Andy Folens; Ubaid Ahmad; Hans Cappelle; Peter Debacker; Lieven Hollevoet; André Bourdoux; Praveen Raghavan; Antoine Dejonghe; Liesbet Van der Perre (GlobalSIP, 2013)

Processor based 20Mhz 4×4 Cat-5 LTE MIMO receiver with advanced detectors. - Min Li 001; Amir Amin; Rodolfo Torrea Duran; Ubaid Ahmad; Raf Appeltans; Antoine Dejonghe; Liesbet Van der Perre (ICASSP, 2013)

A unified receiver signal processing architecture for all modes of the DTMB broadcasting system. - André Bourdoux; Min Li 001; Hans Cappelle; Amir Amin; Raf Appeltans; Andy Folens; Antoine Dejonghe (PIMRC, 2013)

Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication. - Prabhat Avasare; Jeroen Declerck; Miguel Glassee; Amir Amin; Erik Umans; Praveen Raghavan; Martin Palkovic (Int. J. Embed. Real Time Commun. Syst., 2013)

Exploration of Lattice Reduction Aided Soft-Output MIMO Detection on a DLP/ILP Baseband Processor. - Ubaid Ahmad; Min Li 001; Raf Appeltans; Hoang Duy Nguyen; Amir Amin; Antoine Dejonghe; Liesbet Van der Perre; Rudy Lauwereins; Sofie Pollin (IEEE Trans. Signal Process., 2013)

Exploration of Full HD Media Decoding on a Software Defined Radio Baseband Processor. - Chen Mei; Min Li 001; Peng Cao 002; Amir Amin; Chunshu Li; Jun Yang 006; Antoine Dejonghe; Liesbet Van der Perre; Longxing Shi; Sofie Pollin (IEEE Trans. Signal Process., 2013)

Towards approaching near-optimal MIMO detection performance ONAC-programmable baseband processor. - Ubaid Ahmad; Min Li 001; Amir Amin; Meng Li 012; Liesbet Van der Perre; Rudy Lauwereins; Sofie Pollin (ICASSP, 2014)

An Energy-Efficient Reconfigurable ASIP Supporting Multi-mode MIMO Detection. - Ubaid Ahmad; Min Li 001; Amir Amin; Meng Li 012; Liesbet Van der Perre; Rudy Lauwereins; Sofie Pollin (J. Signal Process. Syst., 2016)