FPGA Technology Mapping for Power Minimization. - Amir H. Farrahi; Majid Sarrafzadeh (FPL, 1994)

Complexity of the lookup-table minimization problem for FPGA technology mapping. - Amir H. Farrahi; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

Memory Segmentation to Exploit Sleep Mode Operation. - Amir H. Farrahi; Gustavo E. Téllez; Majid Sarrafzadeh (DAC, 1995)

System partitioning to maximize sleep time. - Amir H. Farrahi; Majid Sarrafzadeh (ICCAD, 1995)

Activity-driven clock design for low power circuits. - Gustavo E. Téllez; Amir H. Farrahi; Majid Sarrafzadeh (ICCAD, 1995)

Exploiting Sleep Mode for Memory Partitioning and Other Applications. - Amir H. Farrahi; Gustavo E. Téllez; Majid Sarrafzadeh (VLSI Design, 1998)

Two-Way and Multiway Partitioning of a Set of Intervals for Clique-Width Maximization. - Amir H. Farrahi; D. T. Lee; Majid Sarrafzadeh (Algorithmica, 1999)

Quality of EDA CAD Tools: Definitions, Metrics and Directions. - Amir H. Farrahi; David J. Hathaway; Maogang Wang; Majid Sarrafzadeh (ISQED, 2000)

Estimation and removal or routing congestion (discussion session). - Amir H. Farrahi (SLIP, 2000)

On the Power of Logic Resynthesis. - Wei-Liang Lin; Amir H. Farrahi; Majid Sarrafzadeh (SIAM J. Comput., 2000)

Activity-driven clock design. - Amir H. Farrahi; Chunhong Chen; Ankur Srivastava 001; Gustavo E. Téllez; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

On the Problem of Pairing Aircraft for Closely Spaced Parallel Approaches. - Amir H. Farrahi; Savita A. Verma; Thomas E. Kozon (IEEE Trans. Intell. Transp. Syst., 2016)